Bin Meng b813ea9a14 x86: broadwell: Correct I/O APIC ID ...

Currently ID 2 is assgined to broadwell I/O APIC, however per
chromebook_samus.dts 2 is the core#2 LAPIC ID. Now we change
I/O APIC ID to 4 to avoid conflict.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

2016-05-23 15:27:42 +08:00

..

cpu.c

x86: Add basic support for broadwell

2016-03-17 10:27:25 +08:00

iobp.c

x86: broadwell: Add a PCH driver

2016-03-17 10:27:25 +08:00

Kconfig

x86: Add basic support for broadwell

2016-03-17 10:27:25 +08:00

lpc.c

x86: broadwell: Add an LPC driver

2016-03-17 10:27:26 +08:00

Makefile

x86: broadwell: Add support for high-speed I/O lane with ME

2016-03-17 10:27:26 +08:00

me.c

x86: broadwell: Add support for high-speed I/O lane with ME

2016-03-17 10:27:26 +08:00

northbridge.c

x86: broadwell: Add a northbridge driver

2016-03-17 10:27:26 +08:00

pch.c

x86: broadwell: Correct I/O APIC ID

2016-05-23 15:27:42 +08:00

pinctrl_broadwell.c

x86: broadwell: Add a pinctrl driver

2016-03-17 10:27:26 +08:00

power_state.c

x86: broadwell: Add power-control support

2016-03-17 10:27:26 +08:00

refcode.c

x86: broadwell: Add reference code support

2016-03-17 10:27:26 +08:00

sata.c

dm: Rename disk uclass to ahci

2016-05-17 09:54:43 -06:00

sdram.c

x86: Unify reserve_arch() for all x86 boards

2016-05-23 15:18:00 +08:00