Dinh Nguyen 8b73dda86b arm: socfpga: spl: update peripheral pll for dev kit ...

"commit 0d13a0051b2c arm: socfpga: Sync Cyclone V DK PLL configuration"
mistakenly changed CONFIG_HPS_MAINPLLGRP_VCO_NUMER to 39, the correct
value should be 79.

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>

2015-04-21 12:23:17 +02:00

..

iocsr_config.c

arm: socfpga: Add Altera Arria V DK support

2015-03-04 23:07:04 +01:00

iocsr_config.h

arm: socfpga: Add Altera Arria V DK support

2015-03-04 23:07:04 +01:00

Kconfig

arm: socfpga: Add Altera Arria V DK support

2015-03-04 23:07:04 +01:00

MAINTAINERS

arm: socfpga: Add myself as maintainer for the SoCrates board

2014-12-06 13:51:54 +01:00

Makefile

arm: socfpga: Drop cyclone5 suffix from board file name

2015-03-04 23:07:04 +01:00

pinmux_config.c

arm: socfpga: fix uart0 pin mux configuration

2015-04-21 12:23:17 +02:00

pinmux_config.h

arm: socfpga: Sync Cyclone V DK pinmux configuration

2015-03-04 23:07:04 +01:00

pll_config.h

arm: socfpga: spl: update peripheral pll for dev kit

2015-04-21 12:23:17 +02:00

socfpga.c

arm: socfpga: spl: Add s_init stub

2015-04-21 12:23:17 +02:00