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113 lines
2.7 KiB
C
113 lines
2.7 KiB
C
/*
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* (C) Copyright 2007 Freescale Semiconductor, Inc.
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* TsiChung Liew (Tsi-Chung.Liew@freescale.com)
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/timer.h>
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#include <asm/immap.h>
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DECLARE_GLOBAL_DATA_PTR;
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static ulong timestamp;
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#if defined(CONFIG_SLTTMR)
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#ifndef CONFIG_SYS_UDELAY_BASE
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# error "uDelay base not defined!"
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#endif
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#if !defined(CONFIG_SYS_TMR_BASE) || !defined(CONFIG_SYS_INTR_BASE) || !defined(CONFIG_SYS_TMRINTR_NO) || !defined(CONFIG_SYS_TMRINTR_MASK)
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# error "TMR_BASE, INTR_BASE, TMRINTR_NO or TMRINTR_MASk not defined!"
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#endif
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extern void dtimer_intr_setup(void);
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void __udelay(unsigned long usec)
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{
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volatile slt_t *timerp = (slt_t *) (CONFIG_SYS_UDELAY_BASE);
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u32 now, freq;
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/* 1 us period */
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freq = CONFIG_SYS_TIMER_PRESCALER;
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timerp->cr = 0; /* Disable */
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timerp->tcnt = usec * freq;
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timerp->cr = SLT_CR_TEN;
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now = timerp->cnt;
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while (now != 0)
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now = timerp->cnt;
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timerp->sr |= SLT_SR_ST;
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timerp->cr = 0;
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}
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void dtimer_interrupt(void *not_used)
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{
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volatile slt_t *timerp = (slt_t *) (CONFIG_SYS_TMR_BASE);
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/* check for timer interrupt asserted */
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if ((CONFIG_SYS_TMRPND_REG & CONFIG_SYS_TMRINTR_MASK) == CONFIG_SYS_TMRINTR_PEND) {
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timerp->sr |= SLT_SR_ST;
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timestamp++;
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return;
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}
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}
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void timer_init(void)
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{
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volatile slt_t *timerp = (slt_t *) (CONFIG_SYS_TMR_BASE);
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timestamp = 0;
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timerp->cr = 0; /* disable timer */
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timerp->tcnt = 0;
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timerp->sr = SLT_SR_BE | SLT_SR_ST; /* clear status */
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/* initialize and enable timer interrupt */
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irq_install_handler(CONFIG_SYS_TMRINTR_NO, dtimer_interrupt, 0);
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/* Interrupt every ms */
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timerp->tcnt = 1000 * CONFIG_SYS_TIMER_PRESCALER;
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dtimer_intr_setup();
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/* set a period of 1us, set timer mode to restart and
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enable timer and interrupt */
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timerp->cr = SLT_CR_RUN | SLT_CR_IEN | SLT_CR_TEN;
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}
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void reset_timer(void)
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{
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timestamp = 0;
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}
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ulong get_timer(ulong base)
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{
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return (timestamp - base);
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}
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void set_timer(ulong t)
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{
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timestamp = t;
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}
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#endif /* CONFIG_SLTTMR */
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