Michal Simek 5389564b52 ARM: zynq: Add support for 7z010_lr and 7z020_lr ...

Add support for *_lr SOCs. Without this change chips are not going to be
properly identified and bitstream programming won't work.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/14d8905a89d1b31fbb2318512cf57eb0256c11be.1722347416.git.michal.simek@amd.com

2024-08-05 16:13:26 +02:00

..

include/mach

xilinx: common: Remove zynq_board_read_rom_ethaddr()

2022-11-22 15:02:07 +01:00

clk.c

Restore patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"

2024-05-20 13:35:03 -06:00

cpu.c

ARM: zynq: Add support for 7z010_lr and 7z020_lr

2024-08-05 16:13:26 +02:00

ddrc.c

Restore patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"

2024-05-20 13:35:03 -06:00

Kconfig

Kconfig: Centralize prompting for SYS_CONFIG_NAME

2024-02-27 14:18:54 -05:00

lowlevel_init.S

…

Makefile

zynq: Convert arm twd timer to DM driver

2022-09-12 12:03:17 +02:00

ps7_spl_init.c

…

slcr.c

Restore patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"

2024-05-20 13:35:03 -06:00

spl.c

arm64: zynq(mp): Rename spl_board_init() to spl_soc_init()

2024-06-17 16:02:29 +02:00

u-boot-spl.lds

arm: move image_copy_start/end to linker symbols

2024-03-29 10:39:25 -04:00

u-boot.lds

arm: move _end to linker symbols

2024-06-07 16:20:29 -06:00