Anatolij Gustschin a615dfda8c mpc512x: Adjust the DRAM init sequence to the datasheet spec ...

Do maintain a 200 usecs period of stable power and clock before
asserting the CKE signal and sending commands, have at least 200
DRAM clock cycles pass after initialization before data access.

Signed-off-by: Anatolij Gustschin <agust@denx.de>

2013-03-09 08:23:02 +01:00

..

74xx_7xx

arch/powerpc/lib/board.c, *traps.c: sparse fixes

2012-11-04 11:00:35 -07:00

mpc5xx

arch/powerpc/lib/board.c, *traps.c: sparse fixes

2012-11-04 11:00:35 -07:00

mpc5xxx

mpc5200: spl_boot.c: Change init oder to first enable printf

2013-03-09 08:14:24 +01:00

mpc8xx

Clean up libfdt.h includes

2013-02-08 22:32:38 -05:00

mpc8xxx

ppc: Move used_laws to arch_global_data

2013-02-04 09:05:43 -05:00

mpc83xx

ppc: arm: Move sdhc_clk into arch_global_data

2013-02-04 09:05:44 -05:00

mpc85xx

common/fdt_support.c: sparse fixes

2013-02-07 20:38:55 -05:00

mpc86xx

ppc: m68k: Move i2c1_clk, i2c2_clk to arch_global_data

2013-02-04 09:05:42 -05:00

mpc512x

mpc512x: Adjust the DRAM init sequence to the datasheet spec

2013-03-09 08:23:02 +01:00

mpc824x

arch/powerpc/lib/board.c, *traps.c: sparse fixes

2012-11-04 11:00:35 -07:00

mpc8220

ppc: Move mpc8220 clocks to arch_global_data

2013-02-04 09:05:43 -05:00

mpc8260

Clean up libfdt.h includes

2013-02-08 22:32:38 -05:00

ppc4xx

Clean up libfdt.h includes

2013-02-08 22:32:38 -05:00