Dirk Eibach a21b4f0f99 arm: mvebu: Fix SAR1_CPU_CORE_MASK ...

SAR1_CPU_CORE_MASK was wrong, probably copy/paste
from another architecture.

Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>

2015-11-17 23:41:41 +01:00

..

a38x

arm: mvebu: Fix SAR1_CPU_CORE_MASK

2015-11-17 23:41:41 +01:00

axp

arm: mvebu: Add complete SDRAM ECC scrubbing

2015-08-17 18:49:33 +02:00