Nagabhushana Netagunte 0f3d6b06ea da850: modifications for Logic PD Rev.3 AM18xx EVM ...

AHCLKR/UART1_RTS/GP0[11] pin needs to be configured for
NOR to work on Rev.3 EVM. When GP0[11] is low,
the SD0 interface will not work, but NOR flash will.

Signed-off-by: Rajashekhara, Sudhakar <sudhakar.raj@ti.com>
Signed-off-by: Nagabhushana Netagunte <nagabhushana.netagunte@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>

2011-09-04 11:36:19 +02:00

..

davinci_misc.h

DaVinci EMAC: declare function for all DA8xx CPUs

2011-08-03 12:49:19 +02:00

emac_defs.h

DaVinci DM6467: Added ET1011C (LSI) PHY support

2011-02-02 00:54:44 +01:00

emif_defs.h

Move architecture-specific includes to arch/$ARCH/include/asm

2010-04-13 09:13:12 +02:00

gpio.h

DA8xx: add generic GPIO driver

2011-08-03 12:49:19 +02:00

hardware.h

da850: modifications for Logic PD Rev.3 AM18xx EVM

2011-09-04 11:36:19 +02:00

i2c_defs.h

Move architecture-specific includes to arch/$ARCH/include/asm

2010-04-13 09:13:12 +02:00

nand_defs.h

Move architecture-specific includes to arch/$ARCH/include/asm

2010-04-13 09:13:12 +02:00

sdmmc_defs.h

Davinci MMCSD Support

2011-02-02 00:54:44 +01:00