Ye Li 1b631589d4 imx9: Add 233Mhz DDR PLL frequency ...

To support 1.866GTS LPDDR4x timing script, need to add 233Mhz freq
to DDR PLL for second mission point at 933MTS. Otherwise DDR training
will fail.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>

2024-09-19 00:12:41 -03:00

..

altera

drivers: ddr: Remove duplicate newlines

2024-07-22 10:53:05 -06:00

fsl

fsl: mxc: Drop legacy I2c

2024-08-13 06:12:48 +02:00

imx

imx9: Add 233Mhz DDR PLL frequency

2024-09-19 00:12:41 -03:00

marvell

drivers: ddr: Remove duplicate newlines

2024-07-22 10:53:05 -06:00

microchip

Restore patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"

2024-05-20 13:35:03 -06:00

Kconfig

Convert CONFIG_SPD_EEPROM to Kconfig

2022-12-05 16:08:37 -05:00