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373c1428a0
Override __udelay() as 'always inlined' function so that PSCI code run in '__secure' section can call this delay function as well. Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com> Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com> Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
60 lines
1.1 KiB
C
60 lines
1.1 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2017-2022 Intel Corporation <www.intel.com>
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*
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*/
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#include <common.h>
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#include <init.h>
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#include <div64.h>
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#include <asm/io.h>
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#include <asm/arch/timer.h>
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/*
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* Timer initialization
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*/
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int timer_init(void)
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{
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#ifdef CONFIG_SPL_BUILD
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int enable = 0x3; /* timer enable + output signal masked */
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int loadval = ~0;
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/* enable system counter */
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writel(enable, SOCFPGA_GTIMER_SEC_ADDRESS);
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/* enable processor pysical counter */
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asm volatile("msr cntp_ctl_el0, %0" : : "r" (enable));
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asm volatile("msr cntp_tval_el0, %0" : : "r" (loadval));
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#endif
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return 0;
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}
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__always_inline u64 __get_time_stamp(void)
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{
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u64 cntpct;
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isb();
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asm volatile("mrs %0, cntpct_el0" : "=r" (cntpct));
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return cntpct;
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}
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__always_inline uint64_t __usec_to_tick(unsigned long usec)
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{
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u64 tick = usec;
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u64 cntfrq;
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asm volatile("mrs %0, cntfrq_el0" : "=r" (cntfrq));
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tick *= cntfrq;
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do_div(tick, 1000000);
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return tick;
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}
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__always_inline void __udelay(unsigned long usec)
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{
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/* get current timestamp */
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u64 tmp = __get_time_stamp() + __usec_to_tick(usec);
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while (__get_time_stamp() < tmp + 1) /* loop till event */
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;
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} |