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	Took these values directly from the kernel dts files. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
		
			
				
	
	
		
			220 lines
		
	
	
		
			4.8 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
			
		
		
	
	
			220 lines
		
	
	
		
			4.8 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
| #include "skeleton.dtsi"
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| 
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| / {
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| 	compatible = "nvidia,tegra114";
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| 
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| 	tegra_car: clock {
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| 		compatible = "nvidia,tegra114-car";
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| 		reg = <0x60006000 0x1000>;
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| 		#clock-cells = <1>;
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| 	};
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| 
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| 	apbdma: dma {
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| 		compatible = "nvidia,tegra114-apbdma", "nvidia,tegra30-apbdma", "nvidia,tegra20-apbdma";
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| 		reg = <0x6000a000 0x1400>;
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| 		interrupts = <0 104 0x04
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| 			      0 105 0x04
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| 			      0 106 0x04
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| 			      0 107 0x04
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| 			      0 108 0x04
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| 			      0 109 0x04
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| 			      0 110 0x04
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| 			      0 111 0x04
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| 			      0 112 0x04
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| 			      0 113 0x04
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| 			      0 114 0x04
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| 			      0 115 0x04
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| 			      0 116 0x04
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| 			      0 117 0x04
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| 			      0 118 0x04
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| 			      0 119 0x04
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| 			      0 128 0x04
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| 			      0 129 0x04
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| 			      0 130 0x04
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| 			      0 131 0x04
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| 			      0 132 0x04
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| 			      0 133 0x04
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| 			      0 134 0x04
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| 			      0 135 0x04
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| 			      0 136 0x04
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| 			      0 137 0x04
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| 			      0 138 0x04
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| 			      0 139 0x04
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| 			      0 140 0x04
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| 			      0 141 0x04
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| 			      0 142 0x04
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| 			      0 143 0x04>;
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| 	};
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| 
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| 	gpio: gpio {
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| 		compatible = "nvidia,tegra114-gpio", "nvidia,tegra30-gpio";
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| 		reg = <0x6000d000 0x1000>;
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| 		interrupts = <0 32 0x04
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| 			      0 33 0x04
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| 			      0 34 0x04
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| 			      0 35 0x04
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| 			      0 55 0x04
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| 			      0 87 0x04
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| 			      0 89 0x04
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| 			      0 125 0x04>;
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| 		#gpio-cells = <2>;
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| 		gpio-controller;
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| 		#interrupt-cells = <2>;
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| 		interrupt-controller;
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| 	};
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| 
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| 	i2c@7000c000 {
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| 		compatible = "nvidia,tegra114-i2c";
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| 		reg = <0x7000c000 0x100>;
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| 		interrupts = <0 38 0x04>;
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| 		#address-cells = <1>;
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| 		#size-cells = <0>;
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| 		clocks = <&tegra_car 12>;
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| 		status = "disabled";
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| 	};
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| 
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| 	i2c@7000c400 {
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| 		compatible = "nvidia,tegra114-i2c";
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| 		reg = <0x7000c400 0x100>;
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| 		interrupts = <0 84 0x04>;
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| 		#address-cells = <1>;
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| 		#size-cells = <0>;
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| 		clocks = <&tegra_car 54>;
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| 		status = "disabled";
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| 	};
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| 
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| 	i2c@7000c500 {
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| 		compatible = "nvidia,tegra114-i2c";
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| 		reg = <0x7000c500 0x100>;
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| 		interrupts = <0 92 0x04>;
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| 		#address-cells = <1>;
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| 		#size-cells = <0>;
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| 		clocks = <&tegra_car 67>;
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| 		status = "disabled";
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| 	};
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| 
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| 	i2c@7000c700 {
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| 		compatible = "nvidia,tegra114-i2c";
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| 		reg = <0x7000c700 0x100>;
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| 		interrupts = <0 120 0x04>;
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| 		#address-cells = <1>;
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| 		#size-cells = <0>;
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| 		clocks = <&tegra_car 103>;
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| 		status = "disabled";
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| 	};
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| 
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| 	i2c@7000d000 {
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| 		compatible = "nvidia,tegra114-i2c";
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| 		reg = <0x7000d000 0x100>;
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| 		interrupts = <0 53 0x04>;
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| 		#address-cells = <1>;
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| 		#size-cells = <0>;
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| 		clocks = <&tegra_car 47>;
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| 		status = "disabled";
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| 	};
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| 
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| 	spi@7000d400 {
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| 		compatible = "nvidia,tegra114-spi";
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| 		reg = <0x7000d400 0x200>;
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| 		interrupts = <0 59 0x04>;
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| 		nvidia,dma-request-selector = <&apbdma 15>;
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| 		#address-cells = <1>;
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| 		#size-cells = <0>;
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| 		status = "disabled";
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| 		/* PERIPH_ID_SBC1, PLLP_OUT0 */
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| 		clocks = <&tegra_car 41>;
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| 	};
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| 
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| 	spi@7000d600 {
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| 		compatible = "nvidia,tegra114-spi";
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| 		reg = <0x7000d600 0x200>;
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| 		interrupts = <0 82 0x04>;
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| 		nvidia,dma-request-selector = <&apbdma 16>;
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| 		#address-cells = <1>;
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| 		#size-cells = <0>;
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| 		status = "disabled";
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| 		/* PERIPH_ID_SBC2, PLLP_OUT0 */
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| 		clocks = <&tegra_car 44>;
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| 	};
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| 
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| 	spi@7000d800 {
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| 		compatible = "nvidia,tegra114-spi";
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| 		reg = <0x7000d480 0x200>;
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| 		interrupts = <0 83 0x04>;
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| 		nvidia,dma-request-selector = <&apbdma 17>;
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| 		#address-cells = <1>;
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| 		#size-cells = <0>;
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| 		status = "disabled";
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| 		/* PERIPH_ID_SBC3, PLLP_OUT0 */
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| 		clocks = <&tegra_car 46>;
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| 	};
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| 
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| 	spi@7000da00 {
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| 		compatible = "nvidia,tegra114-spi";
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| 		reg = <0x7000da00 0x200>;
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| 		interrupts = <0 93 0x04>;
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| 		nvidia,dma-request-selector = <&apbdma 18>;
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| 		#address-cells = <1>;
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| 		#size-cells = <0>;
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| 		status = "disabled";
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| 		/* PERIPH_ID_SBC4, PLLP_OUT0 */
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| 		clocks = <&tegra_car 68>;
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| 	};
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| 
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| 	spi@7000dc00 {
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| 		compatible = "nvidia,tegra114-spi";
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| 		reg = <0x7000dc00 0x200>;
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| 		interrupts = <0 94 0x04>;
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| 		nvidia,dma-request-selector = <&apbdma 27>;
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| 		#address-cells = <1>;
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| 		#size-cells = <0>;
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| 		status = "disabled";
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| 		/* PERIPH_ID_SBC5, PLLP_OUT0 */
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| 		clocks = <&tegra_car 104>;
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| 	};
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| 
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| 	spi@7000de00 {
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| 		compatible = "nvidia,tegra114-spi";
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| 		reg = <0x7000de00 0x200>;
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| 		interrupts = <0 79 0x04>;
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| 		nvidia,dma-request-selector = <&apbdma 28>;
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| 		#address-cells = <1>;
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| 		#size-cells = <0>;
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| 		status = "disabled";
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| 		/* PERIPH_ID_SBC6, PLLP_OUT0 */
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| 		clocks = <&tegra_car 105>;
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| 	};
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| 
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| 	sdhci@78000000 {
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| 		compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci";
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| 		reg = <0x78000000 0x200>;
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| 		interrupts = <0 14 0x04>;
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| 		clocks = <&tegra_car 14>;
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| 		status = "disable";
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| 	};
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| 
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| 	sdhci@78000200 {
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| 		compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci";
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| 		reg = <0x78000200 0x200>;
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| 		interrupts = <0 15 0x04>;
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| 		clocks = <&tegra_car 9>;
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| 		status = "disable";
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| 	};
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| 
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| 	sdhci@78000400 {
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| 		compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci";
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| 		reg = <0x78000400 0x200>;
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| 		interrupts = <0 19 0x04>;
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| 		clocks = <&tegra_car 69>;
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| 		status = "disable";
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| 	};
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| 
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| 	sdhci@78000600 {
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| 		compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci";
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| 		reg = <0x78000600 0x200>;
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| 		interrupts = <0 31 0x04>;
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| 		clocks = <&tegra_car 15>;
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| 		status = "disable";
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| 	};
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| };
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