mirror of
https://xff.cz/git/u-boot/
synced 2025-10-30 18:05:48 +01:00
2b4ffbf6b4
This syncs drivers/ddr/marvell/a38x/ with the mv_ddr-armada-17.10 branch of https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git. The upstream code is incorporated omitting the ddr4 and apn806 and folding the nested a38x directory up one level. After that a semi-automated step is used to drop unused features with unifdef find drivers/ddr/marvell/a38x/ -name '*.[ch]' | \ xargs unifdef -m -UMV_DDR -UMV_DDR_ATF -UCONFIG_DDR4 \ -UCONFIG_APN806 -UCONFIG_MC_STATIC \ -UCONFIG_MC_STATIC_PRINT -UCONFIG_PHY_STATIC \ -UCONFIG_64BIT INTER_REGS_BASE is updated to be defined as SOC_REGS_PHY_BASE. Some now empty files are removed and the ternary license is replaced with a SPDX GPL-2.0+ identifier. Signed-off-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
103 lines
2.8 KiB
C
103 lines
2.8 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) Marvell International Ltd. and its affiliates
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*/
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#include "mv_ddr_regs.h"
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#include "mv_ddr_sys_env_lib.h"
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static u32 mv_ddr_board_id_get(void)
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{
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#if defined(CONFIG_TARGET_DB_88F6820_GP)
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return DB_GP_68XX_ID;
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#else
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/*
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* Return 0 here for custom board as this should not be used
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* for custom boards.
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*/
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return 0;
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#endif
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}
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static u32 mv_ddr_board_id_index_get(u32 board_id)
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{
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/*
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* Marvell Boards use 0x10 as base for Board ID:
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* mask MSB to receive index for board ID
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*/
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return board_id & (MARVELL_BOARD_ID_MASK - 1);
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}
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/*
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* read gpio input for suspend-wakeup indication
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* return indicating suspend wakeup status:
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* 0 - not supported,
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* 1 - supported: read magic word detect wakeup,
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* 2 - detected wakeup from gpio
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*/
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enum suspend_wakeup_status mv_ddr_sys_env_suspend_wakeup_check(void)
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{
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u32 reg, board_id_index, gpio;
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struct board_wakeup_gpio board_gpio[] = MV_BOARD_WAKEUP_GPIO_INFO;
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board_id_index = mv_ddr_board_id_index_get(mv_ddr_board_id_get());
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if (!(sizeof(board_gpio) / sizeof(struct board_wakeup_gpio) >
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board_id_index)) {
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printf("\n_failed loading Suspend-Wakeup information (invalid board ID)\n");
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return SUSPEND_WAKEUP_DISABLED;
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}
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/*
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* - Detect if Suspend-Wakeup is supported on current board
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* - Fetch the GPIO number for wakeup status input indication
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*/
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if (board_gpio[board_id_index].gpio_num == -1) {
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/* Suspend to RAM is not supported */
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return SUSPEND_WAKEUP_DISABLED;
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} else if (board_gpio[board_id_index].gpio_num == -2) {
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/*
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* Suspend to RAM is supported but GPIO indication is
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* not implemented - Skip
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*/
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return SUSPEND_WAKEUP_ENABLED;
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} else {
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gpio = board_gpio[board_id_index].gpio_num;
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}
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/* Initialize MPP for GPIO (set MPP = 0x0) */
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reg = reg_read(MPP_CONTROL_REG(MPP_REG_NUM(gpio)));
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/* reset MPP21 to 0x0, keep rest of MPP settings*/
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reg &= ~MPP_MASK(gpio);
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reg_write(MPP_CONTROL_REG(MPP_REG_NUM(gpio)), reg);
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/* Initialize GPIO as input */
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reg = reg_read(GPP_DATA_OUT_EN_REG(GPP_REG_NUM(gpio)));
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reg |= GPP_MASK(gpio);
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reg_write(GPP_DATA_OUT_EN_REG(GPP_REG_NUM(gpio)), reg);
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/*
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* Check GPP for input status from PIC: 0 - regular init,
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* 1 - suspend wakeup
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*/
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reg = reg_read(GPP_DATA_IN_REG(GPP_REG_NUM(gpio)));
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/* if GPIO is ON: wakeup from S2RAM indication detected */
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return (reg & GPP_MASK(gpio)) ? SUSPEND_WAKEUP_ENABLED_GPIO_DETECTED :
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SUSPEND_WAKEUP_DISABLED;
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}
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/*
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* get bit mask of enabled cs
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* return bit mask of enabled cs:
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* 1 - only cs0 enabled,
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* 3 - both cs0 and cs1 enabled
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*/
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u32 mv_ddr_sys_env_get_cs_ena_from_reg(void)
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{
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return reg_read(DDR3_RANK_CTRL_REG) &
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((CS_EXIST_MASK << CS_EXIST_OFFS(0)) |
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(CS_EXIST_MASK << CS_EXIST_OFFS(1)) |
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(CS_EXIST_MASK << CS_EXIST_OFFS(2)) |
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(CS_EXIST_MASK << CS_EXIST_OFFS(3)));
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}
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