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2b4ffbf6b4
This syncs drivers/ddr/marvell/a38x/ with the mv_ddr-armada-17.10 branch of https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git. The upstream code is incorporated omitting the ddr4 and apn806 and folding the nested a38x directory up one level. After that a semi-automated step is used to drop unused features with unifdef find drivers/ddr/marvell/a38x/ -name '*.[ch]' | \ xargs unifdef -m -UMV_DDR -UMV_DDR_ATF -UCONFIG_DDR4 \ -UCONFIG_APN806 -UCONFIG_MC_STATIC \ -UCONFIG_MC_STATIC_PRINT -UCONFIG_PHY_STATIC \ -UCONFIG_64BIT INTER_REGS_BASE is updated to be defined as SOC_REGS_PHY_BASE. Some now empty files are removed and the ternary license is replaced with a SPDX GPL-2.0+ identifier. Signed-off-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
65 lines
1.6 KiB
C
65 lines
1.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) Marvell International Ltd. and its affiliates
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*/
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#ifndef _SEQ_EXEC_H
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#define _SEQ_EXEC_H
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#define NA 0xff
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#define DEFAULT_PARAM 0
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#define MV_BOARD_TCLK_ERROR 0xffffffff
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#define NO_DATA 0xffffffff
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#define MAX_DATA_ARRAY 5
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#define FIRST_CELL 0
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/* Operation types */
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enum mv_op {
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WRITE_OP,
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DELAY_OP,
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POLL_OP,
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};
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/* Operation parameters */
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struct op_params {
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u32 unit_base_reg;
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u32 unit_offset;
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u32 mask;
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u32 data[MAX_DATA_ARRAY]; /* data array */
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u8 wait_time; /* msec */
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u16 num_of_loops; /* for polling only */
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};
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/*
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* Sequence parameters. Each sequence contains:
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* 1. Sequence id.
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* 2. Sequence size (total amount of operations during the sequence)
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* 3. a series of operations. operations can be write, poll or delay
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* 4. index in the data array (the entry where the relevant data sits)
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*/
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struct cfg_seq {
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struct op_params *op_params_ptr;
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u8 cfg_seq_size;
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u8 data_arr_idx;
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};
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extern struct cfg_seq serdes_seq_db[];
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/*
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* A generic function type for executing an operation (write, poll or delay)
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*/
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typedef int (*op_execute_func_ptr)(u32 serdes_num, struct op_params *params,
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u32 data_arr_idx);
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/* Specific functions for executing each operation */
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int write_op_execute(u32 serdes_num, struct op_params *params,
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u32 data_arr_idx);
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int delay_op_execute(u32 serdes_num, struct op_params *params,
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u32 data_arr_idx);
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int poll_op_execute(u32 serdes_num, struct op_params *params, u32 data_arr_idx);
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enum mv_op get_cfg_seq_op(struct op_params *params);
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int mv_seq_exec(u32 serdes_num, u32 seq_id);
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#endif /*_SEQ_EXEC_H*/
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