Marek Vasut af50d92ae7 ARM: imx: ddr: Add deskew register programming ...

Fill is code for programming the DDR_PHY_CMD_DESKEW_CONx registers,
which are optional, but can be used to fill in the byte lane delays.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP i.MX U-Boot Team <uboot-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>

2020-08-17 17:55:49 +02:00

..

clock_slice.c

SPDX: Convert all of our single license tags to Linux Kernel style

2018-05-07 09:34:12 -04:00

clock.c

common: Drop log.h from common header

2020-05-18 21:19:18 -04:00

ddr.c

ARM: imx: ddr: Add deskew register programming

2020-08-17 17:55:49 +02:00

Kconfig

ARM: imx: soc: Select default TEXT_BASE for MX7

2020-06-22 17:44:20 +02:00

Makefile

imx: mx7: add system suspend/resume support

2018-09-04 08:47:23 +02:00

psci-mx7.c

common: Drop net.h from common header

2020-05-18 17:33:31 -04:00

psci-suspend.S

imx: mx7: add system suspend/resume support

2018-09-04 08:47:23 +02:00

snvs.c

SPDX: Convert all of our single license tags to Linux Kernel style

2018-05-07 09:34:12 -04:00

soc.c

ARM: imx: Add support for reading out the primary/secondary bmode to MX7

2020-08-17 17:55:31 +02:00