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b3db7be4e3
Update "dma-ranges" DT property of all PCIe controllers in the system with the up-to-date DRAM layout. This allows the PCIe controller take full advantage of all the available DRAM. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
99 lines
2.2 KiB
C
99 lines
2.2 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* board/renesas/rcar-common/common.c
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*
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* Copyright (C) 2013 Renesas Electronics Corporation
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* Copyright (C) 2013 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
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* Copyright (C) 2015 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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*/
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#include <common.h>
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#include <dm.h>
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#include <dm/uclass-internal.h>
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#include <asm/arch/rmobile.h>
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#ifdef CONFIG_RCAR_GEN3
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DECLARE_GLOBAL_DATA_PTR;
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/* If the firmware passed a device tree use it for U-Boot DRAM setup. */
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extern u64 rcar_atf_boot_args[];
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int dram_init(void)
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{
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const void *atf_fdt_blob = (const void *)(rcar_atf_boot_args[1]);
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const void *blob;
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/* Check if ATF passed us DTB. If not, fall back to builtin DTB. */
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if (fdt_magic(atf_fdt_blob) == FDT_MAGIC)
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blob = atf_fdt_blob;
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else
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blob = gd->fdt_blob;
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return fdtdec_setup_mem_size_base_fdt(blob);
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}
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int dram_init_banksize(void)
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{
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const void *atf_fdt_blob = (const void *)(rcar_atf_boot_args[1]);
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const void *blob;
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/* Check if ATF passed us DTB. If not, fall back to builtin DTB. */
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if (fdt_magic(atf_fdt_blob) == FDT_MAGIC)
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blob = atf_fdt_blob;
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else
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blob = gd->fdt_blob;
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fdtdec_setup_memory_banksize_fdt(blob);
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return 0;
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}
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#if CONFIG_IS_ENABLED(OF_BOARD_SETUP) && CONFIG_IS_ENABLED(PCI)
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int ft_board_setup(void *blob, bd_t *bd)
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{
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struct udevice *dev;
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struct uclass *uc;
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fdt_addr_t regs_addr;
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int i, off, ret;
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ret = uclass_get(UCLASS_PCI, &uc);
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if (ret)
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return ret;
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uclass_foreach_dev(dev, uc) {
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struct pci_controller hose = { 0 };
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for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
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if (hose.region_count == MAX_PCI_REGIONS) {
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printf("maximum number of regions parsed, aborting\n");
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break;
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}
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if (bd->bi_dram[i].size) {
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pci_set_region(&hose.regions[hose.region_count++],
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bd->bi_dram[i].start,
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bd->bi_dram[i].start,
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bd->bi_dram[i].size,
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PCI_REGION_MEM |
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PCI_REGION_PREFETCH |
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PCI_REGION_SYS_MEMORY);
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}
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}
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regs_addr = devfdt_get_addr_index(dev, 0);
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off = fdt_node_offset_by_compat_reg(blob,
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"renesas,pcie-rcar-gen3", regs_addr);
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if (off < 0) {
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printf("Failed to find PCIe node@%llx\n", regs_addr);
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return off;
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}
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fdt_pci_dma_ranges(blob, off, &hose);
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}
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return 0;
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}
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#endif
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#endif
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