Fabio Estevam 0f1411bc8d spi: mxc_spi: Set master mode for all channels ...

The glitch in the SPI clock line, which commit 3cea335c34 (spi: mxc_spi: Fix spi
clock glitch durant reset) solved, is back now and itwas re-introduced by
commit d36b39bf0d (spi: mxc_spi: Fix ECSPI reset handling).

Actually the glitch is happening due to always toggling between slave mode
and master mode by configuring the CHANNEL_MODE bits in this reset function.

Since the spi driver only supports master mode, set the mode for all channels
always to master mode in order to have a stable, "glitch-free" SPI clock line.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>

2013-04-13 17:46:42 +02:00

..

clock.h

mx5/6: Define default SoC input clock frequencies

2012-10-15 11:54:10 -07:00

crm_regs.h

i.MX6: crm_regs: define CCM_CCGRx for use in board config files

2013-03-07 16:43:46 +01:00

gpio.h

…

imx-regs.h

spi: mxc_spi: Set master mode for all channels

2013-04-13 17:46:42 +02:00

iomux.h

i.MX6: crm_regs: define IOMUXC_GPR4/6/7

2013-03-07 16:43:46 +01:00

mx6-ddr.h

i.MX6: Add DDR controller registers

2013-03-07 16:43:47 +01:00

mx6-pins.h

i.MX6: consolidate pad names for multi-CPU boards

2013-03-07 16:43:46 +01:00

mx6dl_pins.h

Add initial support for Wandboard dual lite and solo.

2013-03-20 11:47:37 +01:00

mx6dl-ddr.h

i.MX6: Add DDR controller registers

2013-03-07 16:43:47 +01:00

mx6q_pins.h

i.MX6: consolidate pad names for multi-CPU boards

2013-03-07 16:43:46 +01:00

mx6q-ddr.h

i.MX6: Add DDR controller registers

2013-03-07 16:43:47 +01:00

mxc_hdmi.h

mx6: Provide a structure for accessing HDMI registers

2013-03-07 18:03:44 +01:00

sys_proto.h

imx-common: cpu: add imx_ddr_size

2012-11-10 08:15:40 +01:00