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	needed for RCC MISC driver and sysreset with syscon in SPL Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
		
			
				
	
	
		
			75 lines
		
	
	
		
			1.6 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
			
		
		
	
	
			75 lines
		
	
	
		
			1.6 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
| if ARCH_STM32MP
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| 
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| config SPL
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| 	select SPL_BOARD_INIT
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| 	select SPL_CLK
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| 	select SPL_DM
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| 	select SPL_DM_SEQ_ALIAS
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| 	select SPL_DRIVERS_MISC_SUPPORT
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| 	select SPL_FRAMEWORK
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| 	select SPL_GPIO_SUPPORT
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| 	select SPL_LIBCOMMON_SUPPORT
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| 	select SPL_LIBGENERIC_SUPPORT
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| 	select SPL_OF_CONTROL
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| 	select SPL_OF_TRANSLATE
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| 	select SPL_PINCTRL
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| 	select SPL_REGMAP
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| 	select SPL_DM_RESET
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| 	select SPL_SERIAL_SUPPORT
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| 	select SPL_SYSCON
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| 	select SPL_DRIVERS_MISC_SUPPORT
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| 	imply SPL_LIBDISK_SUPPORT
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| 
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| config SYS_SOC
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| 	default "stm32mp"
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| 
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| config TARGET_STM32MP1
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| 	bool "Support stm32mp1xx"
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| 	select ARCH_SUPPORT_PSCI
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| 	select CPU_V7A
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| 	select CPU_V7_HAS_NONSEC
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| 	select CPU_V7_HAS_VIRT
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| 	select PINCTRL_STM32
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| 	select STM32_RCC
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| 	select STM32_RESET
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| 	select SYS_ARCH_TIMER
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| 	select SYSRESET_SYSCON
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| 	help
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| 		target STMicroelectronics SOC STM32MP1 family
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| 		STMicroelectronics MPU with core ARMv7
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| 
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| config SYS_TEXT_BASE
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| 	prompt "U-Boot base address"
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| 	default 0xC0100000
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| 	help
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| 		configure the U-Boot base address
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| 		when DDR driver is used:
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| 		  DDR + 1MB (0xC0100000)
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| 
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| config SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_MMC2
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| 	hex "Partition on MMC2 to use to load U-Boot from"
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| 	depends on SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
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| 	default 1
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| 	help
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| 	  Partition on the second MMC to load U-Boot from when the MMC is being
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| 	  used in raw mode
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| 
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| source "board/st/stm32mp1/Kconfig"
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| 
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| # currently activated for debug / should be deactivated for real product
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| if DEBUG_UART
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| 
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| config DEBUG_UART_BOARD_INIT
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| 	default y
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| 
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| # debug on UART4 by default
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| config DEBUG_UART_BASE
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| 	default 0x40010000
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| 
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| # clock source is HSI on reset
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| config DEBUG_UART_CLOCK
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| 	default 64000000
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| endif
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| 
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| endif
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