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41575d8e4c
This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
237 lines
6.4 KiB
C
237 lines
6.4 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Meson8, Meson8b and GXBB USB2 PHY driver
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*
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* Copyright (C) 2016 Martin Blumenstingl <martin.blumenstingl@googlemail.com>
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* Copyright (C) 2018 BayLibre, SAS
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*
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* Author: Beniamino Galvani <b.galvani@gmail.com>
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*/
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#include <common.h>
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#include <clk.h>
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#include <dm.h>
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#include <generic-phy.h>
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#include <power/regulator.h>
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#include <regmap.h>
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#include <reset.h>
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#include <linux/bitops.h>
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#define REG_CONFIG 0x00
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#define REG_CONFIG_CLK_EN BIT(0)
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#define REG_CONFIG_CLK_SEL_MASK GENMASK(3, 1)
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#define REG_CONFIG_CLK_DIV_MASK GENMASK(10, 4)
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#define REG_CONFIG_CLK_32k_ALTSEL BIT(15)
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#define REG_CONFIG_TEST_TRIG BIT(31)
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#define REG_CTRL 0x04
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#define REG_CTRL_SOFT_PRST BIT(0)
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#define REG_CTRL_SOFT_HRESET BIT(1)
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#define REG_CTRL_SS_SCALEDOWN_MODE_MASK GENMASK(3, 2)
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#define REG_CTRL_CLK_DET_RST BIT(4)
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#define REG_CTRL_INTR_SEL BIT(5)
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#define REG_CTRL_CLK_DETECTED BIT(8)
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#define REG_CTRL_SOF_SENT_RCVD_TGL BIT(9)
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#define REG_CTRL_SOF_TOGGLE_OUT BIT(10)
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#define REG_CTRL_POWER_ON_RESET BIT(15)
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#define REG_CTRL_SLEEPM BIT(16)
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#define REG_CTRL_TX_BITSTUFF_ENN_H BIT(17)
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#define REG_CTRL_TX_BITSTUFF_ENN BIT(18)
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#define REG_CTRL_COMMON_ON BIT(19)
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#define REG_CTRL_REF_CLK_SEL_MASK GENMASK(21, 20)
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#define REG_CTRL_REF_CLK_SEL_SHIFT 20
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#define REG_CTRL_FSEL_MASK GENMASK(24, 22)
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#define REG_CTRL_FSEL_SHIFT 22
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#define REG_CTRL_PORT_RESET BIT(25)
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#define REG_CTRL_THREAD_ID_MASK GENMASK(31, 26)
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/* bits [31:26], [24:21] and [15:3] seem to be read-only */
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#define REG_ADP_BC 0x0c
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#define REG_ADP_BC_VBUS_VLD_EXT_SEL BIT(0)
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#define REG_ADP_BC_VBUS_VLD_EXT BIT(1)
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#define REG_ADP_BC_OTG_DISABLE BIT(2)
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#define REG_ADP_BC_ID_PULLUP BIT(3)
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#define REG_ADP_BC_DRV_VBUS BIT(4)
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#define REG_ADP_BC_ADP_PRB_EN BIT(5)
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#define REG_ADP_BC_ADP_DISCHARGE BIT(6)
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#define REG_ADP_BC_ADP_CHARGE BIT(7)
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#define REG_ADP_BC_SESS_END BIT(8)
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#define REG_ADP_BC_DEVICE_SESS_VLD BIT(9)
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#define REG_ADP_BC_B_VALID BIT(10)
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#define REG_ADP_BC_A_VALID BIT(11)
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#define REG_ADP_BC_ID_DIG BIT(12)
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#define REG_ADP_BC_VBUS_VALID BIT(13)
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#define REG_ADP_BC_ADP_PROBE BIT(14)
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#define REG_ADP_BC_ADP_SENSE BIT(15)
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#define REG_ADP_BC_ACA_ENABLE BIT(16)
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#define REG_ADP_BC_DCD_ENABLE BIT(17)
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#define REG_ADP_BC_VDAT_DET_EN_B BIT(18)
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#define REG_ADP_BC_VDAT_SRC_EN_B BIT(19)
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#define REG_ADP_BC_CHARGE_SEL BIT(20)
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#define REG_ADP_BC_CHARGE_DETECT BIT(21)
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#define REG_ADP_BC_ACA_PIN_RANGE_C BIT(22)
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#define REG_ADP_BC_ACA_PIN_RANGE_B BIT(23)
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#define REG_ADP_BC_ACA_PIN_RANGE_A BIT(24)
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#define REG_ADP_BC_ACA_PIN_GND BIT(25)
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#define REG_ADP_BC_ACA_PIN_FLOAT BIT(26)
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#define RESET_COMPLETE_TIME 500
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#define ACA_ENABLE_COMPLETE_TIME 50
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struct phy_meson_gxbb_usb2_priv {
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struct regmap *regmap;
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struct reset_ctl_bulk resets;
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#if CONFIG_IS_ENABLED(DM_REGULATOR)
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struct udevice *phy_supply;
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#endif
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};
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static int phy_meson_gxbb_usb2_power_on(struct phy *phy)
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{
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struct udevice *dev = phy->dev;
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struct phy_meson_gxbb_usb2_priv *priv = dev_get_priv(dev);
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uint val;
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#if CONFIG_IS_ENABLED(DM_REGULATOR)
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if (priv->phy_supply) {
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int ret = regulator_set_enable(priv->phy_supply, true);
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if (ret)
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return ret;
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}
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#endif
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regmap_update_bits(priv->regmap, REG_CONFIG,
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REG_CONFIG_CLK_32k_ALTSEL,
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REG_CONFIG_CLK_32k_ALTSEL);
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regmap_update_bits(priv->regmap, REG_CTRL,
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REG_CTRL_REF_CLK_SEL_MASK,
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0x2 << REG_CTRL_REF_CLK_SEL_SHIFT);
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regmap_update_bits(priv->regmap, REG_CTRL,
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REG_CTRL_FSEL_MASK,
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0x5 << REG_CTRL_FSEL_SHIFT);
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/* reset the PHY */
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regmap_update_bits(priv->regmap, REG_CTRL,
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REG_CTRL_POWER_ON_RESET,
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REG_CTRL_POWER_ON_RESET);
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udelay(RESET_COMPLETE_TIME);
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regmap_update_bits(priv->regmap, REG_CTRL,
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REG_CTRL_POWER_ON_RESET,
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0);
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udelay(RESET_COMPLETE_TIME);
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regmap_update_bits(priv->regmap, REG_CTRL,
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REG_CTRL_SOF_TOGGLE_OUT,
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REG_CTRL_SOF_TOGGLE_OUT);
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/* Set host mode */
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regmap_update_bits(priv->regmap, REG_ADP_BC,
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REG_ADP_BC_ACA_ENABLE,
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REG_ADP_BC_ACA_ENABLE);
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udelay(ACA_ENABLE_COMPLETE_TIME);
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regmap_read(priv->regmap, REG_ADP_BC, &val);
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if (val & REG_ADP_BC_ACA_PIN_FLOAT) {
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pr_err("Error powering on GXBB USB PHY\n");
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return -EINVAL;
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}
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return 0;
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}
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static int phy_meson_gxbb_usb2_power_off(struct phy *phy)
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{
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#if CONFIG_IS_ENABLED(DM_REGULATOR)
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struct udevice *dev = phy->dev;
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struct phy_meson_gxbb_usb2_priv *priv = dev_get_priv(dev);
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if (priv->phy_supply) {
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int ret = regulator_set_enable(priv->phy_supply, false);
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if (ret)
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return ret;
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}
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#endif
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return 0;
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}
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static struct phy_ops meson_gxbb_usb2_phy_ops = {
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.power_on = phy_meson_gxbb_usb2_power_on,
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.power_off = phy_meson_gxbb_usb2_power_off,
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};
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static int meson_gxbb_usb2_phy_probe(struct udevice *dev)
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{
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struct phy_meson_gxbb_usb2_priv *priv = dev_get_priv(dev);
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struct clk clk_usb_general, clk_usb;
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int ret;
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ret = regmap_init_mem(dev_ofnode(dev), &priv->regmap);
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if (ret)
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return ret;
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ret = clk_get_by_name(dev, "usb_general", &clk_usb_general);
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if (ret)
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return ret;
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ret = clk_enable(&clk_usb_general);
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if (ret && ret != -ENOSYS && ret != -ENOTSUPP) {
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pr_err("Failed to enable PHY general clock\n");
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return ret;
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}
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ret = clk_get_by_name(dev, "usb", &clk_usb);
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if (ret)
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return ret;
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ret = clk_enable(&clk_usb);
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if (ret && ret != -ENOSYS && ret != -ENOTSUPP) {
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pr_err("Failed to enable PHY clock\n");
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return ret;
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}
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#if CONFIG_IS_ENABLED(DM_REGULATOR)
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ret = device_get_supply_regulator(dev, "phy-supply", &priv->phy_supply);
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if (ret && ret != -ENOENT) {
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pr_err("Failed to get PHY regulator\n");
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return ret;
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}
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#endif
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ret = reset_get_bulk(dev, &priv->resets);
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if (!ret) {
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ret = reset_deassert_bulk(&priv->resets);
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if (ret) {
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pr_err("Failed to deassert reset\n");
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return ret;
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}
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}
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return 0;
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}
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static int meson_gxbb_usb2_phy_remove(struct udevice *dev)
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{
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struct phy_meson_gxbb_usb2_priv *priv = dev_get_priv(dev);
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return reset_release_bulk(&priv->resets);
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}
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static const struct udevice_id meson_gxbb_usb2_phy_ids[] = {
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{ .compatible = "amlogic,meson8-usb2-phy" },
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{ .compatible = "amlogic,meson8b-usb2-phy" },
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{ .compatible = "amlogic,meson-gxbb-usb2-phy" },
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{ }
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};
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U_BOOT_DRIVER(meson_gxbb_usb2_phy) = {
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.name = "meson_gxbb_usb2_phy",
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.id = UCLASS_PHY,
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.of_match = meson_gxbb_usb2_phy_ids,
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.probe = meson_gxbb_usb2_phy_probe,
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.remove = meson_gxbb_usb2_phy_remove,
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.ops = &meson_gxbb_usb2_phy_ops,
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.priv_auto = sizeof(struct phy_meson_gxbb_usb2_priv),
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};
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