Ralph Siemsen b0b08ce0b7 arm: socfpga: fix Gen5 enable of EMAC via FPGA ...

An earlier conversion from struct to defines introduced two errors, both
related to setup of EMAC routed via the FPGA. One of the offsets was
incorrect, and the EMAC0/EMAC1 were swapped.

The effect of this was rather odd: both ports could operate at gigabit,
but one of them would fail to transmit when operating at 100Mbit.

Fixes: db5741f7a8 ("arm: socfpga: Convert system manager from struct to defines")

Signed-off-by: Ralph Siemsen <ralph.siemsen@linaro.org>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>

2020-10-21 11:45:54 +08:00

..

mach

arm: socfpga: fix Gen5 enable of EMAC via FPGA

2020-10-21 11:45:54 +08:00