1
0
mirror of https://xff.cz/git/u-boot/ synced 2026-01-01 17:27:11 +01:00
Files
u-boot-megous/drivers
Bryan Brattlof 10c8bafbc3 soc: soc_ti_k3: identify j7200 SR2.0 SoCs
Anytime a new revision of a chip is produced, Texas Instruments
will increment the 4 bit VARIANT section of the CTRLMMR_WKUP_JTAGID
register by one. Typically this will be decoded as SR1.0 -> SR2.0 ...
however a few TI SoCs do not follow this convention.

Rather than defining a revision string array for each SoC, use a
default revision string array for all TI SoCs that continue to follow
the typical 1.0 -> 2.0 revision scheme.

Signed-off-by: Bryan Brattlof <bb@ti.com>
2022-07-06 14:30:51 -04:00
..
2022-04-25 09:25:00 +02:00
2022-06-23 13:12:55 -04:00
2022-06-24 14:16:00 +02:00
2021-10-05 08:50:15 -04:00
2022-01-13 07:57:49 -05:00
2022-04-28 09:26:44 -04:00
2022-01-13 07:57:49 -05:00
2022-06-23 13:12:56 -04:00
2022-06-08 14:00:22 -04:00
2022-05-02 09:58:13 -04:00
2022-05-03 21:39:22 +02:00
2021-10-01 21:08:18 -04:00