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	Add defines required to turn on LDO2 regulator. Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il>
		
			
				
	
	
		
			129 lines
		
	
	
		
			3.0 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			129 lines
		
	
	
		
			3.0 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * (C) Copyright 2012-2013
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|  * Texas Instruments, <www.ti.com>
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|  *
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|  * SPDX-License-Identifier:	GPL-2.0+
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|  */
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| #ifndef PALMAS_H
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| #define PALMAS_H
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| 
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| #include <common.h>
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| #include <i2c.h>
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| 
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| /* I2C chip addresses, TW6035/37 */
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| #define TWL603X_CHIP_P1		0x48	/* Page 1 */
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| #define TWL603X_CHIP_P2		0x49	/* Page 2 */
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| #define TWL603X_CHIP_P3		0x4a	/* Page 3 */
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| 
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| /* TPS659038/39 */
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| #define TPS65903X_CHIP_P1	0x58	/* Page 1 */
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| 
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| /* Page 1 registers (0x1XY translates to page 1, reg addr 0xXY): */
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| 
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| /* LDO1 control/voltage */
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| #define LDO1_CTRL		0x50
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| #define LDO1_VOLTAGE		0x51
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| 
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| /* LDO2 control/voltage */
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| #define LDO2_CTRL		0x52
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| #define LDO2_VOLTAGE		0x53
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| 
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| /* LDO9 control/voltage */
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| #define LDO9_CTRL		0x60
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| #define LDO9_VOLTAGE		0x61
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| 
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| /* LDOUSB control/voltage */
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| #define LDOUSB_CTRL		0x64
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| #define LDOUSB_VOLTAGE		0x65
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| #define LDO_CTRL		0x6a
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| 
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| /* Control of 32 kHz audio clock */
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| #define CLK32KGAUDIO_CTRL	0xd5
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| 
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| /* SYSEN2_CTRL for VCC_3v3_AUX supply on the sEVM */
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| #define SYSEN2_CTRL		0xd9
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| 
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| /*
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|  * Bit field definitions for LDOx_CTRL, SYSENx_CTRL
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|  * and some other xxx_CTRL resources:
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|  */
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| #define LDO9_BYP_EN		(1 << 6)	/* LDO9 only! */
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| #define RSC_STAT_ON		(1 << 4)	/* RO status bit! */
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| #define RSC_MODE_SLEEP		(1 << 2)
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| #define RSC_MODE_ACTIVE		(1 << 0)
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| 
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| /* Some LDO voltage values */
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| #define LDO_VOLT_OFF		0
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| #define LDO_VOLT_1V8		0x13
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| #define LDO_VOLT_3V0		0x2b
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| #define LDO_VOLT_3V3		0x31
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| /* Request bypass, LDO9 only */
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| #define LDO9_BYPASS		0x3f
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| 
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| /* SMPS7_CTRL */
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| #define SMPS7_CTRL		0x30
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| 
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| /* SMPS9_CTRL */
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| #define SMPS9_CTRL		0x38
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| #define SMPS9_VOLTAGE		0x3b
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| 
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| /* SMPS10_CTRL */
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| #define SMPS10_CTRL		0x3c
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| #define SMPS10_MODE_ACTIVE_D	0x0d
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| 
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| /* Bit field definitions for SMPSx_CTRL */
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| #define SMPS_MODE_ACT_AUTO	1
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| #define SMPS_MODE_ACT_ECO	2
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| #define SMPS_MODE_ACT_FPWM	3
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| #define SMPS_MODE_SLP_AUTO	(1 << 2)
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| #define SMPS_MODE_SLP_ECO	(2 << 2)
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| #define SMPS_MODE_SLP_FPWM	(3 << 2)
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| 
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| /*
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|  * Some popular SMPS voltages, all with RANGE=1; note
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|  * that RANGE cannot be changed on the fly
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|  */
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| #define SMPS_VOLT_OFF		0
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| #define SMPS_VOLT_1V2		0x90
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| #define SMPS_VOLT_1V8		0xae
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| #define SMPS_VOLT_2V1		0xbd
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| #define SMPS_VOLT_3V0		0xea
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| #define SMPS_VOLT_3V3		0xf9
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| 
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| /* Backup Battery & VRTC Control */
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| #define BB_VRTC_CTRL		0xa8
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| /* Bit definitions for BB_VRTC_CTRL */
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| #define VRTC_EN_SLP		(1 << 6)
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| #define VRTC_EN_OFF		(1 << 5)
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| #define VRTC_PWEN		(1 << 4)
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| #define BB_LOW_ICHRG		(1 << 3)
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| #define BB_HIGH_ICHRG		(0 << 3)
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| #define BB_VSEL_3V0		(0 << 1)
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| #define BB_VSEL_2V5		(1 << 1)
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| #define BB_VSEL_3V15		(2 << 1)
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| #define BB_VSEL_VBAT		(3 << 1)
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| #define BB_CHRG_EN		(1 << 0)
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| 
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| /*
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|  * Functions to read and write from TPS659038/TWL6035/TWL6037
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|  * or other Palmas family of TI PMICs
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|  */
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| static inline int palmas_i2c_write_u8(u8 chip_no, u8 reg, u8 val)
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| {
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| 	return i2c_write(chip_no, reg, 1, &val, 1);
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| }
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| 
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| static inline int palmas_i2c_read_u8(u8 chip_no, u8 reg, u8 *val)
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| {
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| 	return i2c_read(chip_no, reg, 1, val, 1);
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| }
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| 
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| void palmas_init_settings(void);
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| int palmas_mmc1_poweron_ldo(void);
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| int twl603x_mmc1_set_ldo9(u8 vsel);
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| int twl603x_audio_power(u8 on);
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| int twl603x_enable_bb_charge(u8 bb_fields);
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| int palmas_enable_ss_ldo(void);
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| 
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| #endif /* PALMAS_H */
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