1
0
mirror of https://xff.cz/git/u-boot/ synced 2025-12-29 05:07:10 +01:00
Files
u-boot-megous/include
Prabhakar Kushwaha 562de1d6da board/t1040qds: Relax IFC FPGA timings
Current IFC-FPGA TCH(Chip Select hold time with respect to WE deassertion)
is 0 i.e. 0 ns hold time on writes. This may not work on higher clock
freqencies.

So, Increase TCH as 0x8 i.e. 8 ip_clk.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
2014-01-02 14:10:13 -08:00
..
2013-04-01 16:33:52 -04:00
2013-04-01 16:33:52 -04:00
2013-04-28 11:07:40 +02:00
2013-06-26 10:07:11 -04:00
2013-09-24 09:10:33 -04:00
2013-04-01 16:33:52 -04:00
2013-09-20 10:30:54 -04:00
2013-11-09 17:21:01 +01:00
2013-11-09 17:21:01 +01:00
2013-12-04 08:11:28 -05:00
2013-08-28 11:44:59 -04:00