Pavel Machek 51fb455f82 socfpga: fix clock manager register definition ...

Structure defining clock manager hardware was wrong, leading to
wrong registers being accessed and hang in MMC init.

This fixes structure to match hardware.

Signed-off-by: Pavel Machek <pavel@denx.de>

2014-08-29 15:50:50 -04:00

..

clock_manager.h

socfpga: fix clock manager register definition

2014-08-29 15:50:50 -04:00

dwmmc.h

socfpga/dwmmc: Adding DesignWare MMC driver support for SOCFPGA

2014-01-09 11:53:55 +02:00

freeze_controller.h

socfpga: Adding Freeze Controller driver

2013-12-03 14:38:56 +01:00

reset_manager.h

socfpga: Creating driver for Reset Manager

2013-09-06 12:09:06 +02:00

scan_manager.h

socfpga: Adding Scan Manager driver

2014-07-05 00:27:27 +02:00

socfpga_base_addrs.h

socfpga: Adding Scan Manager driver

2014-07-05 00:27:27 +02:00

spl.h

Add GPL-2.0+ SPDX-License-Identifier to source files

2013-07-24 09:44:38 -04:00

system_manager.h

socfpga/dwmmc: Adding DesignWare MMC driver support for SOCFPGA

2014-01-09 11:53:55 +02:00

timer.h

Add GPL-2.0+ SPDX-License-Identifier to source files

2013-07-24 09:44:38 -04:00