Yu Chien Peter Lin bdb238355c riscv: andes_plic.c: use modified IPI scheme ...

The IPI scheme in OpenSBI has been updated to support 8-core AE350
platform, the plicsw configuration needs to be modified accordingly.

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Rick Chen <rick@andestech.com>

2022-10-20 15:23:41 +08:00

..

cpu

Merge branch 'next' of https://gitlab.denx.de/u-boot/custodians/u-boot-riscv into next

2022-09-26 11:27:30 -04:00

dts

riscv: dts: sifive: Synchronize FU740 and Unmatched DT

2022-09-06 13:00:41 +08:00

include/asm

riscv: Introduce AVAILABLE_HARTS

2022-09-26 14:29:13 +08:00

lib

riscv: andes_plic.c: use modified IPI scheme

2022-10-20 15:23:41 +08:00

config.mk

kconfig / kbuild: Re-sync with Linux 4.19

2020-04-10 11:18:32 -04:00

Kconfig

riscv: support building double-float modules

2022-10-20 15:22:21 +08:00

Makefile

riscv: support building double-float modules

2022-10-20 15:22:21 +08:00