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d678a59d2d
When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"' I failed to notice that b4 noticed it was based on next and so took that as the base commit and merged that part of next to master. This reverts commitc8ffd1356d, reversing changes made to2ee6f3a5f7. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com>
136 lines
2.8 KiB
C
136 lines
2.8 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* mcf_wdt.c - driver for ColdFire on-chip watchdog
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*
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* Author: Angelo Dureghello <angelo@kernel-space.org>
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*
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*/
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#include <common.h>
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#include <dm.h>
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#include <hang.h>
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#include <asm/io.h>
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#include <wdt.h>
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#include <linux/bitops.h>
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#define DIVIDER_5XXX 4096
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#define DIVIDER_5282 8192
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#define WCR_EN BIT(0)
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#define WCR_HALTED BIT(1)
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#define WCR_DOZE BIT(2)
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#define WCR_WAIT BIT(3)
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struct watchdog_regs {
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u16 wcr; /* Control */
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u16 wmr; /* Service */
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u16 wcntr; /* Counter */
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u16 wsr; /* Reset Status */
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};
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static void mcf_watchdog_reset(struct watchdog_regs *wdog)
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{
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if (!IS_ENABLED(CONFIG_WATCHDOG_RESET_DISABLE)) {
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writew(0x5555, &wdog->wsr);
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writew(0xaaaa, &wdog->wsr);
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}
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}
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static void mcf_watchdog_init(struct watchdog_regs *wdog, u32 fixed_divider,
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u64 timeout_msecs)
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{
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u32 wdog_module, cycles_per_sec;
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cycles_per_sec = CFG_SYS_CLK / fixed_divider;
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wdog_module = cycles_per_sec * ((u32)timeout_msecs / 1000);
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wdog_module += (cycles_per_sec / 1000) * ((u32)timeout_msecs % 1000);
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/* Limit check, max 16 bits */
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if (wdog_module > 0xffff)
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wdog_module = 0xffff;
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/* Set timeout and enable watchdog */
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writew((u16)wdog_module, &wdog->wmr);
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writew(WCR_EN, &wdog->wcr);
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mcf_watchdog_reset(wdog);
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}
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struct mcf_wdt_priv {
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void __iomem *base;
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u32 fixed_divider;
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};
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static int mcf_wdt_expire_now(struct udevice *dev, ulong flags)
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{
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hang();
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return 0;
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}
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static int mcf_wdt_reset(struct udevice *dev)
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{
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struct mcf_wdt_priv *priv = dev_get_priv(dev);
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mcf_watchdog_reset(priv->base);
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return 0;
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}
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static int mcf_wdt_start(struct udevice *dev, u64 timeout, ulong flags)
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{
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struct mcf_wdt_priv *priv = dev_get_priv(dev);
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/* Timeout from fdt (timeout) comes in milliseconds */
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mcf_watchdog_init(priv->base, priv->fixed_divider, timeout);
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return 0;
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}
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static int mcf_wdt_stop(struct udevice *dev)
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{
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struct mcf_wdt_priv *priv = dev_get_priv(dev);
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struct watchdog_regs *wdog = (struct watchdog_regs *)priv->base;
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setbits_be16(&wdog->wcr, WCR_HALTED);
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return 0;
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}
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static int mcf_wdt_probe(struct udevice *dev)
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{
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struct mcf_wdt_priv *priv = dev_get_priv(dev);
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priv->base = dev_read_addr_ptr(dev);
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if (!priv->base)
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return -ENOENT;
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priv->fixed_divider = (u32)dev_get_driver_data(dev);
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return 0;
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}
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static const struct wdt_ops mcf_wdt_ops = {
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.start = mcf_wdt_start,
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.stop = mcf_wdt_stop,
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.reset = mcf_wdt_reset,
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.expire_now = mcf_wdt_expire_now,
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};
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static const struct udevice_id mcf_wdt_ids[] = {
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{ .compatible = "fsl,mcf5208-wdt", .data = DIVIDER_5XXX },
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{ .compatible = "fsl,mcf5282-wdt", .data = DIVIDER_5282 },
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{}
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};
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U_BOOT_DRIVER(mcf_wdt) = {
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.name = "mcf_wdt",
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.id = UCLASS_WDT,
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.of_match = mcf_wdt_ids,
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.probe = mcf_wdt_probe,
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.ops = &mcf_wdt_ops,
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.priv_auto = sizeof(struct mcf_wdt_priv),
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.flags = DM_FLAG_PRE_RELOC,
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};
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