Svyatoslav Ryhel 944ac34075 ARM: tegra114: clock: implement PLLD2 support ...

PLLD2 is a simple clock (controlled by 2 registers) and appears starting
from T30. Primary use of PLLD2 is as main HDMI clock parent.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>

2023-12-19 21:24:11 +02:00

..

arc

arc: Remove common.h usage

2023-10-24 16:34:45 -04:00

arm

ARM: tegra114: clock: implement PLLD2 support

2023-12-19 21:24:11 +02:00

m68k

m68k: Remove CONFIG_FSLDMAFEC

2023-11-07 14:50:51 -05:00

microblaze

microblaze: Remove common.h usage

2023-10-24 16:34:45 -04:00

mips

clk: treewide: switch to clock dump from clk_ops

2023-12-15 13:05:54 -05:00

nios2

nios2: io.h: Add defines for ins/outs functions

2023-11-28 16:19:06 -05:00

powerpc

Merge patch series "Import "string" I/O functions from Linux"

2023-11-28 16:19:19 -05:00

riscv

Merge branch 'next' of https://source.denx.de/u-boot/custodians/u-boot-riscv into next

2023-12-18 09:56:58 -05:00

sandbox

Merge tag 'v2024.01-rc5' into next

2023-12-18 09:55:32 -05:00

sh

spl: Use SYS_MALLOC_F instead of SYS_MALLOC_F_LEN

2023-10-06 14:38:12 -04:00

x86

acpi: move acpi_get_rsdp_addr() to acpi/acpi_table.h

2023-12-13 18:39:05 -05:00

xtensa

xtensa: io.h: Add defines for ins/outs functions

2023-11-28 16:19:06 -05:00

.gitignore

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Kconfig

scsi: Forceably finish migration to DM_SCSI

2023-11-07 18:36:06 -05:00

Kconfig.nxp

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u-boot-elf.lds

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