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	Zynq is using Cadence IP where binding is documented in the Linux kernel and there is no reason to use different binding. Synchronize it. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
		
			
				
	
	
		
			33 lines
		
	
	
		
			1.1 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
			
		
		
	
	
			33 lines
		
	
	
		
			1.1 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
| Cadence SPI controller Device Tree Bindings
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| -------------------------------------------
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| 
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| Required properties:
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| - compatible		: Should be "cdns,spi-r1p6" or "xlnx,zynq-spi-r1p6".
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| - reg			: Physical base address and size of SPI registers map.
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| - interrupts		: Property with a value describing the interrupt
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| 			  number.
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| - interrupt-parent	: Must be core interrupt controller
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| - clock-names		: List of input clock names - "ref_clk", "pclk"
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| 			  (See clock bindings for details).
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| - clocks		: Clock phandles (see clock bindings for details).
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| - spi-max-frequency	: Maximum SPI clocking speed of device in Hz
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| 
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| Optional properties:
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| - num-cs		: Number of chip selects used.
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| 			  If a decoder is used, this will be the number of
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| 			  chip selects after the decoder.
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| - is-decoded-cs		: Flag to indicate whether decoder is used or not.
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| 
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| Example:
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| 
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| 	spi@e0007000 {
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| 		compatible = "xlnx,zynq-spi-r1p6";
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| 		clock-names = "ref_clk", "pclk";
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| 		clocks = <&clkc 26>, <&clkc 35>;
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| 		interrupt-parent = <&intc>;
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| 		interrupts = <0 49 4>;
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| 		num-cs = <4>;
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| 		is-decoded-cs = <0>;
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| 		reg = <0xe0007000 0x1000>;
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| 	} ;
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