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106 lines
2.8 KiB
C
106 lines
2.8 KiB
C
/*
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* (C) Copyright 2006
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* Markus Klotzbuecher, DENX Software Engineering <mk@denx.de>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#if defined(CONFIG_USB_OHCI_NEW) && defined(CONFIG_SYS_USB_OHCI_CPU_INIT)
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# if defined(CONFIG_CPU_MONAHANS) || defined(CONFIG_PXA27X)
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#include <asm/arch/pxa-regs.h>
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#include <asm/io.h>
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#include <usb.h>
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int usb_cpu_init(void)
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{
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#if defined(CONFIG_CPU_MONAHANS)
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/* Enable USB host clock. */
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writel(readl(CKENA) | CKENA_2_USBHOST | CKENA_20_UDC, CKENA);
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udelay(100);
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#endif
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#if defined(CONFIG_PXA27X)
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/* Enable USB host clock. */
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writel(readl(CKEN) | CKEN10_USBHOST, CKEN);
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#endif
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#if defined(CONFIG_CPU_MONAHANS)
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/* Configure Port 2 for Host (USB Client Registers) */
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writel(0x3000c, UP2OCR);
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#endif
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writel(readl(UHCHR) | UHCHR_FHR, UHCHR);
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wait_ms(11);
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writel(readl(UHCHR) & ~UHCHR_FHR, UHCHR);
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writel(readl(UHCHR) | UHCHR_FSBIR, UHCHR);
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while (readl(UHCHR) & UHCHR_FSBIR)
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udelay(1);
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#if defined(CONFIG_CPU_MONAHANS)
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writel(readl(UHCHR) & ~UHCHR_SSEP0, UHCHR);
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#endif
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#if defined(CONFIG_PXA27X)
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writel(readl(UHCHR) & ~UHCHR_SSEP2, UHCHR);
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#endif
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writel(readl(UHCHR) & ~(UHCHR_SSEP1 | UHCHR_SSE), UHCHR);
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return 0;
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}
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int usb_cpu_stop(void)
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{
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writel(readl(UHCHR) | UHCHR_FHR, UHCHR);
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udelay(11);
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writel(readl(UHCHR) & ~UHCHR_FHR, UHCHR);
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writel(readl(UHCCOMS) | UHCHR_FHR, UHCCOMS);
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udelay(10);
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#if defined(CONFIG_CPU_MONAHANS)
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writel(readl(UHCHR) | UHCHR_SSEP0, UHCHR);
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#endif
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#if defined(CONFIG_PXA27X)
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writel(readl(UHCHR) | UHCHR_SSEP2, UHCHR);
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#endif
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writel(readl(UHCHR) | UHCHR_SSEP1 | UHCHR_SSE, UHCHR);
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#if defined(CONFIG_CPU_MONAHANS)
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/* Disable USB host clock. */
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writel(readl(CKENA) & ~(CKENA_2_USBHOST | CKENA_20_UDC), CKENA);
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udelay(100);
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#endif
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#if defined(CONFIG_PXA27X)
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/* Disable USB host clock. */
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writel(readl(CKEN) & ~CKEN10_USBHOST, CKEN);
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#endif
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return 0;
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}
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int usb_cpu_init_fail(void)
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{
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return usb_cpu_stop();
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}
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# endif /* defined(CONFIG_CPU_MONAHANS) || defined(CONFIG_PXA27X) */
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#endif /* defined(CONFIG_USB_OHCI) && defined(CONFIG_SYS_USB_OHCI_CPU_INIT) */
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