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u-boot-megous/drivers/clk
Patrick Delaunay bbd108a082 clk: stm32mp1: correctly handle Clock Spreading Generator
To activate the csg option, the driver need to set the bit2
of PLLNCR register = SSCG_CTRL: Spread Spectrum Clock Generator
of PLLn enable.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-02-09 07:50:57 -05:00
..
2019-01-09 17:03:29 +01:00
2018-11-26 14:40:52 +01:00
2019-01-18 22:19:08 +05:30
2019-01-18 22:19:08 +05:30