Pali Rohár 2721997654 ddr: fsl: Allow to detect 4 GB DDR modules in 32-bit mode ...

U-Boot core code already handles the case when RAM size is bigger than
CONFIG_MAX_MEM_MAPPED. So there is no need to do duplicate check in fsl ddr
driver for CONFIG_MAX_MEM_MAPPED. Instead simplify code to just check if
RAM size can be representable in phys_size_t type. And avoid printing
warning if phys_size_t is just 1 byte smaller than RAM size, which is the
typical situation with 4 GB DDR module.

Signed-off-by: Pali Rohár <pali@kernel.org>

2022-09-23 15:13:18 -04:00

..

arm_ddr_gen3.c

…

ctrl_regs.c

ddr: fsl: Make bank_addr_bits reflect actual bits

2022-09-06 09:28:46 +08:00

ddr1_dimm_params.c

common: Drop linux/bitops.h from common header

2020-05-18 21:19:23 -04:00

ddr2_dimm_params.c

common: Drop linux/bitops.h from common header

2020-05-18 21:19:23 -04:00

ddr3_dimm_params.c

WS cleanup: remove SPACE(s) followed by TAB

2021-09-30 09:08:16 -04:00

ddr4_dimm_params.c

ddr: fsl: Make bank_addr_bits reflect actual bits

2022-09-06 09:28:46 +08:00

fsl_ddr_gen4.c

drivers: ddr: fsl_ddr_gen4.c: Fix divide by zero issue

2021-11-09 14:43:24 +05:30

fsl_mmdc.c

…

interactive.c

ddr: fsl: Reduce the size of interactive options

2022-09-06 09:28:45 +08:00

Kconfig

Convert CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS et al to Kconfig

2022-08-12 16:10:49 -04:00

lc_common_dimm_params.c

drivers: ddr: lc_common_dimm_params.c : Fix Divison by zero issue

2021-11-09 17:18:23 +05:30

main.c

ddr: fsl: Allow to detect 4 GB DDR modules in 32-bit mode

2022-09-23 15:13:18 -04:00

Makefile

ppc: Remove sbc8641d board

2021-07-07 19:52:24 -04:00

mpc85xx_ddr_gen1.c

ppc: Remove MPC8555CDS boards

2021-07-07 19:52:23 -04:00

mpc85xx_ddr_gen2.c

…

mpc85xx_ddr_gen3.c

ddr: Rework errata A008109, A008378, 009942 workaround

2020-06-04 18:53:20 +05:30

options.c

ddr: fsl: Allow to compile it without env support

2022-04-26 17:18:39 +05:30

util.c

drivers: ddr: util.c: Fix divide by zero issue

2021-11-09 14:43:24 +05:30