Marek Vasut 25fefe8bf8 ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase_sweep_dq_in_delay() part 3 ...

Replace at least one of the loops in this function with call of a
standard function call instead of the ad-hoc implementation. The
other one cannot be replaced, since the delay is incremented for
each group.

Signed-off-by: Marek Vasut <marex@denx.de>

2015-08-08 14:14:18 +02:00

..

altera

ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase_sweep_dq_in_delay() part 3

2015-08-08 14:14:18 +02:00

fsl

drivers/ddr/fsl: Adjust bstopre value

2015-08-03 12:06:38 -07:00

marvell

arm: mvebu: a38x: Use correct PEX register access macros

2015-07-23 10:39:25 +02:00