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a0ed800376
It is useful for this command to show the address of the interrupt table. Add support for this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
82 lines
1.4 KiB
C
82 lines
1.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* (C) Copyright 2009
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* Graeme Russ, graeme.russ@gmail.com
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*
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* (C) Copyright 2002
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* Daniel Engström, Omicron Ceti AB, daniel@omicron.se
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*/
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#ifndef __ASM_INTERRUPT_H_
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#define __ASM_INTERRUPT_H_ 1
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#include <asm/types.h>
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#define SYS_NUM_IRQS 16
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/* Architecture defined exceptions */
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enum x86_exception {
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EXC_DE = 0,
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EXC_DB,
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EXC_NMI,
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EXC_BP,
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EXC_OF,
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EXC_BR,
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EXC_UD,
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EXC_NM,
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EXC_DF,
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EXC_CSO,
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EXC_TS,
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EXC_NP,
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EXC_SS,
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EXC_GP,
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EXC_PF,
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EXC_MF = 16,
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EXC_AC,
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EXC_MC,
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EXC_XM,
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EXC_VE
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};
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/**
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* struct idt_ptr - Holds the IDT (Interrupt Descriptor Table)
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*
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* @size: Size of IDT in bytes
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*/
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struct idt_ptr {
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unsigned short size;
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unsigned long address;
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} __packed;
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/* arch/x86/cpu/interrupts.c */
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void set_vector(u8 intnum, void *routine);
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/* Architecture specific functions */
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void mask_irq(int irq);
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void unmask_irq(int irq);
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void specific_eoi(int irq);
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extern char exception_stack[];
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/**
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* configure_irq_trigger() - Configure IRQ triggering
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*
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* Switch the given interrupt to be level / edge triggered
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*
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* @param int_num legacy interrupt number (3-7, 9-15)
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* @param is_level_triggered true for level triggered interrupt, false for
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* edge triggered interrupt
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*/
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void configure_irq_trigger(int int_num, bool is_level_triggered);
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void *x86_get_idt(void);
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/**
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* interrupt_read_idt() - Read the IDT
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*
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* @ptr: Place to put IDT contents
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*/
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void interrupt_read_idt(struct idt_ptr *ptr);
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#endif
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