Ley Foon Tan 69f9c8bab8 arm: socfpga: Add onchip RAM size macro ...

Add OCRAM size macro for Gen5 and Arria 10.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>

2020-03-31 02:52:38 +02:00

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base_addr_a10.h

arm: socfpga: Add onchip RAM size macro

2020-03-31 02:52:38 +02:00

base_addr_ac5.h

arm: socfpga: Add onchip RAM size macro

2020-03-31 02:52:38 +02:00

base_addr_s10.h

arm: socfpga: agilex: Add base address for Intel Agilex SoC

2020-01-07 14:38:33 +01:00

boot0.h

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clock_manager_agilex.h

arm: socfpga: agilex: Add clock wrapper functions

2020-01-07 14:38:33 +01:00

clock_manager_arria10.h

arm: socfpga: Convert clock manager from struct to defines

2020-01-07 14:38:33 +01:00

clock_manager_gen5.h

arm: socfpga: Convert clock manager from struct to defines

2020-01-07 14:38:33 +01:00

clock_manager_s10.h

arm: socfpga: Move Stratix10 and Agilex clock manager common code

2020-01-07 14:38:33 +01:00

clock_manager_soc64.h

arm: socfpga: Fix CLKMGR_INTOSC_HZ to 400MHz

2020-01-07 14:38:33 +01:00

clock_manager.h

arm: socfpga: agilex: Add clock wrapper functions

2020-01-07 14:38:33 +01:00

firewall.h

arm: socfpga: stratix10: Enable SMMU access

2020-01-07 14:38:34 +01:00

fpga_manager_arria10.h

spl: socfpga: Implement fpga bitstream loading with socfpga loadfs

2019-05-10 22:48:11 +02:00

fpga_manager_gen5.h

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fpga_manager.h

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freeze_controller.h

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gpio.h

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handoff_s10.h

arm: agilex: Add clock handoff offset for Agilex

2020-01-07 14:38:33 +01:00

mailbox_s10.h

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misc.h

arm: socfpga: Convert reset manager from struct to defines

2020-01-07 14:38:33 +01:00

nic301.h

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pinmux.h

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reset_manager_arria10.h

arm: socfpga: Convert reset manager from struct to defines

2020-01-07 14:38:33 +01:00

reset_manager_gen5.h

arm: socfpga: Convert reset manager from struct to defines

2020-01-07 14:38:33 +01:00

reset_manager_soc64.h

arm: socfpga: Move Stratix10 and Agilex reset manager common code

2020-01-07 14:38:33 +01:00

reset_manager.h

arm: socfpga: agilex: Add reset manager support

2020-01-07 14:38:33 +01:00

scan_manager.h

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scu.h

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sdram_arria10.h

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sdram_gen5.h

ddr: altera: Add DDR2 support to Gen5 driver

2020-02-05 03:01:57 +01:00

sdram.h

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system_manager_arria10.h

arm: socfpga: Convert system manager from struct to defines

2020-01-07 14:38:33 +01:00

system_manager_gen5.h

arm: socfpga: Convert system manager from struct to defines

2020-01-07 14:38:33 +01:00

system_manager_soc64.h

arm: socfpga: Move Stratix10 and Agilex system manager common code

2020-01-07 14:38:33 +01:00

system_manager.h

arm: socfpga: agilex: Add system manager support

2020-01-07 14:38:33 +01:00

timer.h

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