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1f47e2aca42c2e51ff3a7754c717ee13f568c721
u-boot-megous/drivers/clk
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Tom Rini 1f47e2aca4 Merge tag 'xilinx-for-v2020.07' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze into next 
Xilinx changes for v2020.07

common:
- Align ENV_FAT_INTERFACE
- Fix MAC address source print log
- Improve based autodetection code

xilinx:
- Enable netconsole

Microblaze:
- Setup default ENV_OFFSET/ENV_SECT_SIZE

Zynq:
- Multiple DT updates/fixes
- Use DEVICE_TREE environment variable for DTB selection
- Switch to single zynq configuration
- Enable NOR flash via DM
- Minor SPL print removal
- Enable i2c mux driver

ZynqMP:
- Print multiboot register
- Enable cache commands in mini mtest
- Multiple DT updates/fixes
- Fix firmware probing when driver is not enabled
- Specify 3rd backup RAM boot mode in SPL
- Add SPL support for zcu102 v1.1 and zcu111 revA
- Redesign debug uart enabling and psu_init delay
- Enable full u-boot run from EL3
- Enable u-boot.itb generation without ATF with U-Boot in EL3

Versal:
- Enable distro default
- Enable others SPI flashes
- Enable systems without DDR

Drivers:
- Gem:
  - Flush memory after freeing
  - Handle mdio bus separately
- Watchdog:
  - Get rid of unused global data pointer
  - Enable window watchdog timer
- Serial:
  - Change reinitialization logic in zynq serial driver

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-04-07 17:13:35 -04:00
..
altera
dm: core: Create a new header file for 'compat' features
2020-02-05 19:33:46 -07:00
analogbits
clk: sifive: Sync-up WRPLL library with upstream Linux
2019-07-19 14:24:51 +08:00
aspeed
dm: core: Require users of devres to include the header
2020-02-05 19:33:46 -07:00
at91
dm: core: Create a new header file for 'compat' features
2020-02-05 19:33:46 -07:00
exynos
clk: Remove DM_FLAG_PRE_RELOC flag in various drivers
2018-11-14 09:16:28 -08:00
imx
dm: core: Create a new header file for 'compat' features
2020-02-05 19:33:46 -07:00
intel
x86: remove dead code in intel_clk_get_rate()
2020-03-05 18:19:40 +08:00
mediatek
clk: mediatek: use unsigned type for returning the clk rate
2020-01-26 12:03:06 +01:00
meson
dm: core: Require users of devres to include the header
2020-02-05 19:33:46 -07:00
mtmips
clk: add clock driver for MediaTek MT76x8 platform
2019-10-25 17:20:44 +02:00
mvebu
dm: core: Create a new header file for 'compat' features
2020-02-05 19:33:46 -07:00
owl
clk: Remove DM_FLAG_PRE_RELOC flag in various drivers
2018-11-14 09:16:28 -08:00
renesas
clk: renesas: Switch to fdtdec_get_addr_size_auto_noparent() on Gen2
2020-03-30 03:49:23 +02:00
rockchip
clk: rk3399: Set empty for vopl assigned-clocks
2020-04-02 15:44:56 +02:00
sifive
dm: core: Require users of devres to include the header
2020-02-05 19:33:46 -07:00
sunxi
sunxi: clocks: Add H6 USB clock gates and resets
2019-07-16 17:13:15 +05:30
tegra
dm: core: Create a new header file for 'compat' features
2020-02-05 19:33:46 -07:00
uniphier
dm: core: Create a new header file for 'compat' features
2020-02-05 19:33:46 -07:00
clk_bcm6345.c
clk: bcm6345: convert to use live dt
2018-06-01 15:56:02 +02:00
clk_boston.c
SPDX: Convert all of our single license tags to Linux Kernel style
2018-05-07 09:34:12 -04:00
clk_fixed_factor.c
dm: core: Require users of devres to include the header
2020-02-05 19:33:46 -07:00
clk_fixed_rate.c
clk: fixed_rate: add dummy enable() function
2020-01-16 09:39:45 -05:00
clk_pic32.c
common: Move get_tbclk() to time.h
2020-01-17 13:27:30 -05:00
clk_sandbox_ccf.c
dm: core: Create a new header file for 'compat' features
2020-02-05 19:33:46 -07:00
clk_sandbox_test.c
dm: core: Create a new header file for 'compat' features
2020-02-05 19:33:46 -07:00
clk_sandbox.c
dm: core: Create a new header file for 'compat' features
2020-02-05 19:33:46 -07:00
clk_stm32f.c
clk: clk_stm32f: Use PLLSAIP as USB 48MHz clock
2018-05-08 09:07:34 -04:00
clk_stm32h7.c
SPDX: Convert all of our single license tags to Linux Kernel style
2018-05-07 09:34:12 -04:00
clk_stm32mp1.c
clk: stm32mp1: add SPI5_K support
2020-03-24 14:18:09 +01:00
clk_versal.c
versal: drivers: clk: Fix invalid clock name queries
2020-02-28 12:04:10 +01:00
clk_vexpress_osc.c
dm: core: Create a new header file for 'compat' features
2020-02-05 19:33:46 -07:00
clk_zynq.c
dm: core: Create a new header file for 'compat' features
2020-02-05 19:33:46 -07:00
clk_zynqmp.c
dm: core: Create a new header file for 'compat' features
2020-02-05 19:33:46 -07:00
clk-cdce9xx.c
dm: core: Create a new header file for 'compat' features
2020-02-05 19:33:46 -07:00
clk-composite.c
dm: core: Require users of devres to include the header
2020-02-05 19:33:46 -07:00
clk-divider.c
dm: core: Require users of devres to include the header
2020-02-05 19:33:46 -07:00
clk-fixed-factor.c
dm: core: Require users of devres to include the header
2020-02-05 19:33:46 -07:00
clk-gate.c
dm: core: Require users of devres to include the header
2020-02-05 19:33:46 -07:00
clk-hsdk-cgu.c
CLK: HSDK: fix HDMI clock calculation
2020-02-12 20:47:39 +03:00
clk-mux.c
dm: core: Require users of devres to include the header
2020-02-05 19:33:46 -07:00
clk-ti-sci.c
dm: core: Create a new header file for 'compat' features
2020-02-05 19:33:46 -07:00
clk-uclass.c
dm: core: Create a new header file for 'compat' features
2020-02-05 19:33:46 -07:00
clk.c
clk: show more error info when uclass_get_device_by_name
2020-01-26 12:03:06 +01:00
ics8n3qv01.c
clk: Add ICS8N3QV01 driver
2018-05-08 18:50:23 -04:00
Kconfig
x86: Add a clock driver for Intel devices
2020-02-07 22:41:24 +08:00
Makefile
x86: Add a clock driver for Intel devices
2020-02-07 22:41:24 +08:00
mpc83xx_clk.c
common: Move clock functions into a new file
2020-01-17 13:27:29 -05:00
mpc83xx_clk.h
clk: Add MPC83xx clock driver
2018-09-18 00:01:18 -06:00