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	Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
		
			
				
	
	
		
			375 lines
		
	
	
		
			8.1 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			375 lines
		
	
	
		
			8.1 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| // SPDX-License-Identifier: GPL-2.0
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| /*
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|  * SII Semiconductor Corporation S35392A RTC driver.
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|  *
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|  * Copyright (c) 2017, General Electric Company
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|  *
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|  * This program is free software; you can redistribute it and/or modify it
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|  * under the terms and conditions of the GNU General Public License,
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|  * version 2, as published by the Free Software Foundation.
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|  *
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|  * This program is distributed in the hope it will be useful, but WITHOUT
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|  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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|  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
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|  * more details.
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|  *
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|  * You should have received a copy of the GNU General Public License
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|  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
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|  */
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| 
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| #include <command.h>
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| #include <common.h>
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| #include <dm.h>
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| #include <i2c.h>
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| #include <linux/bitrev.h>
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| #include <rtc.h>
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| #include <linux/delay.h>
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| 
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| #define S35390A_CHIP_ADDR	0x30
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| 
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| #define S35390A_CMD_STATUS1	0x0
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| #define S35390A_CMD_STATUS2	0x1
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| #define S35390A_CMD_TIME1	0x2
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| #define S35390A_CMD_TIME2	0x3
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| #define S35390A_CMD_INT2_REG1	0x5
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| 
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| #define S35390A_BYTE_YEAR	0
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| #define S35390A_BYTE_MONTH	1
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| #define S35390A_BYTE_DAY	2
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| #define S35390A_BYTE_WDAY	3
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| #define S35390A_BYTE_HOURS	4
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| #define S35390A_BYTE_MINS	5
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| #define S35390A_BYTE_SECS	6
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| 
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| /* flags for STATUS1 */
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| #define S35390A_FLAG_POC	0x01
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| #define S35390A_FLAG_BLD	0x02
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| #define S35390A_FLAG_INT2	0x04
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| #define S35390A_FLAG_24H	0x40
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| #define S35390A_FLAG_RESET	0x80
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| 
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| /*
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|  * If either BLD or POC is set, then the chip has lost power long enough for
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|  * the time value to become invalid.
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|  */
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| #define S35390A_LOW_VOLTAGE (S35390A_FLAG_POC | S35390A_FLAG_BLD)
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| 
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| /*---------------------------------------------------------------------*/
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| #undef DEBUG_RTC
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| 
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| #ifdef DEBUG_RTC
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| #define DEBUGR(fmt, args...) printf(fmt, ##args)
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| #else
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| #define DEBUGR(fmt, args...)
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| #endif
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| /*---------------------------------------------------------------------*/
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| 
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| #ifdef CONFIG_DM_RTC
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| #define DEV_TYPE struct udevice
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| #else
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| /* Local udevice */
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| struct ludevice {
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| 	u8 chip;
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| };
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| 
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| #define DEV_TYPE struct ludevice
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| struct ludevice dev;
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| 
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| #endif
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| 
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| #define msleep(a) udelay(a * 1000)
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| 
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| int lowvoltage;
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| 
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| static int s35392a_rtc_reset(DEV_TYPE *dev);
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| 
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| static int s35392a_rtc_read(DEV_TYPE *dev, u8 reg, u8 *buf, int len)
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| {
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| 	int ret;
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| 
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| #ifdef CONFIG_DM_RTC
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| 	ret = dm_i2c_read(dev, reg, buf, len);
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| #else
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| 	(void)dev;
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| 	ret = i2c_read(S35390A_CHIP_ADDR | reg, 0, -1, buf, len);
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| #endif
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| 
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| 	return ret;
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| }
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| 
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| static int s35392a_rtc_write(DEV_TYPE *dev, u8 reg, u8 *buf, int len)
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| {
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| 	int ret;
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| 
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| #ifdef CONFIG_DM_RTC
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| 	ret = dm_i2c_write(dev, reg, buf, len);
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| #else
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| 	(void)dev;
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| 	ret = i2c_write(S35390A_CHIP_ADDR | reg, 0, 0, buf, len);
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| #endif
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| 
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| 	return ret;
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| }
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| 
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| static int s35392a_rtc_read8(DEV_TYPE *dev, unsigned int reg)
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| {
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| 	u8 val;
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| 	int ret;
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| 
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| 	ret = s35392a_rtc_read(dev, reg, &val, sizeof(val));
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| 	return ret < 0 ? ret : val;
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| }
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| 
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| static int s35392a_rtc_write8(DEV_TYPE *dev, unsigned int reg, int val)
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| {
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| 	int ret;
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| 	u8 lval = val;
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| 
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| 	ret = s35392a_rtc_write(dev, reg, &lval, sizeof(lval));
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| 	return ret < 0 ? ret : 0;
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| }
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| 
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| static int validate_time(const struct rtc_time *tm)
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| {
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| 	if ((tm->tm_year < 2000) || (tm->tm_year > 2099))
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| 		return -EINVAL;
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| 
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| 	if ((tm->tm_mon < 1) || (tm->tm_mon > 12))
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| 		return -EINVAL;
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| 
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| 	if ((tm->tm_mday < 1) || (tm->tm_mday > 31))
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| 		return -EINVAL;
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| 
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| 	if ((tm->tm_wday < 0) || (tm->tm_wday > 6))
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| 		return -EINVAL;
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| 
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| 	if ((tm->tm_hour < 0) || (tm->tm_hour > 23))
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| 		return -EINVAL;
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| 
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| 	if ((tm->tm_min < 0) || (tm->tm_min > 59))
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| 		return -EINVAL;
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| 
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| 	if ((tm->tm_sec < 0) || (tm->tm_sec > 59))
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| 		return -EINVAL;
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| 
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| 	return 0;
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| }
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| 
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| void s35392a_rtc_init(DEV_TYPE *dev)
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| {
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| 	int status;
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| 
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| 	status = s35392a_rtc_read8(dev, S35390A_CMD_STATUS1);
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| 	if (status < 0)
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| 		goto error;
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| 
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| 	DEBUGR("init: S35390A_CMD_STATUS1: 0x%x\n", status);
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| 
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| 	lowvoltage = status & S35390A_LOW_VOLTAGE ? 1 : 0;
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| 
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| 	if (status & S35390A_FLAG_POC)
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| 		/*
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| 		 * Do not communicate for 0.5 seconds since the power-on
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| 		 * detection circuit is in operation.
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| 		 */
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| 		msleep(500);
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| 
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| 	else if (!lowvoltage)
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| 		/*
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| 		 * If both POC and BLD are unset everything is fine.
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| 		 */
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| 		return;
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| 
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| 	if (lowvoltage)
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| 		printf("RTC low voltage detected\n");
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| 
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| 	if (!s35392a_rtc_reset(dev))
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| 		return;
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| 
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| error:
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| 	printf("Error RTC init.\n");
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| }
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| 
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| /* Get the current time from the RTC */
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| static int s35392a_rtc_get(DEV_TYPE *dev, struct rtc_time *tm)
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| {
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| 	u8 date[7];
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| 	int ret, i;
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| 
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| 	if (lowvoltage) {
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| 		DEBUGR("RTC low voltage detected\n");
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| 		return -EINVAL;
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| 	}
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| 
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| 	ret = s35392a_rtc_read(dev, S35390A_CMD_TIME1, date, sizeof(date));
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| 	if (ret < 0) {
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| 		DEBUGR("Error reading date from RTC\n");
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| 		return -EIO;
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| 	}
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| 
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| 	/* This chip returns the bits of each byte in reverse order */
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| 	for (i = 0; i < 7; ++i)
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| 		date[i] = bitrev8(date[i]);
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| 
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| 	tm->tm_sec  = bcd2bin(date[S35390A_BYTE_SECS]);
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| 	tm->tm_min  = bcd2bin(date[S35390A_BYTE_MINS]);
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| 	tm->tm_hour = bcd2bin(date[S35390A_BYTE_HOURS] & ~S35390A_FLAG_24H);
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| 	tm->tm_wday = bcd2bin(date[S35390A_BYTE_WDAY]);
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| 	tm->tm_mday = bcd2bin(date[S35390A_BYTE_DAY]);
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| 	tm->tm_mon  = bcd2bin(date[S35390A_BYTE_MONTH]);
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| 	tm->tm_year = bcd2bin(date[S35390A_BYTE_YEAR]) + 2000;
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| 
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| 	DEBUGR("Get DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
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| 	       tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday,
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| 	       tm->tm_hour, tm->tm_min, tm->tm_sec);
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| 
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| 	return 0;
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| }
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| 
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| /* Set the RTC */
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| static int s35392a_rtc_set(DEV_TYPE *dev, const struct rtc_time *tm)
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| {
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| 	int i, ret;
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| 	int status;
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| 	u8 date[7];
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| 
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| 	DEBUGR("Set DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
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| 	       tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday,
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| 	       tm->tm_hour, tm->tm_min, tm->tm_sec);
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| 
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| 	ret = validate_time(tm);
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| 	if (ret < 0)
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| 		return -EINVAL;
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| 
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| 	/* We support only 24h mode */
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| 	ret = s35392a_rtc_read8(dev, S35390A_CMD_STATUS1);
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| 	if (ret < 0)
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| 		return -EIO;
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| 	status = ret;
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| 
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| 	ret = s35392a_rtc_write8(dev, S35390A_CMD_STATUS1,
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| 				 status | S35390A_FLAG_24H);
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| 	if (ret < 0)
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| 		return -EIO;
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| 
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| 	date[S35390A_BYTE_YEAR]  = bin2bcd(tm->tm_year - 2000);
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| 	date[S35390A_BYTE_MONTH] = bin2bcd(tm->tm_mon);
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| 	date[S35390A_BYTE_DAY]   = bin2bcd(tm->tm_mday);
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| 	date[S35390A_BYTE_WDAY]  = bin2bcd(tm->tm_wday);
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| 	date[S35390A_BYTE_HOURS] = bin2bcd(tm->tm_hour);
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| 	date[S35390A_BYTE_MINS]  = bin2bcd(tm->tm_min);
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| 	date[S35390A_BYTE_SECS]  = bin2bcd(tm->tm_sec);
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| 
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| 	/* This chip expects the bits of each byte to be in reverse order */
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| 	for (i = 0; i < 7; ++i)
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| 		date[i] = bitrev8(date[i]);
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| 
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| 	ret = s35392a_rtc_write(dev, S35390A_CMD_TIME1, date, sizeof(date));
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| 	if (ret < 0) {
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| 		DEBUGR("Error writing date to RTC\n");
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| 		return -EIO;
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| 	}
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| 
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| 	/* Now we have time. Reset the low voltage status */
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| 	lowvoltage = 0;
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| 
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| 	return 0;
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| }
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| 
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| /* Reset the RTC. */
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| static int s35392a_rtc_reset(DEV_TYPE *dev)
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| {
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| 	int buf;
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| 	int ret;
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| 	unsigned int initcount = 0;
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| 
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| 	buf = S35390A_FLAG_RESET;
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| 
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| initialize:
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| 	ret = s35392a_rtc_write8(dev, S35390A_CMD_STATUS1, buf);
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| 	if (ret < 0)
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| 		return -EIO;
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| 
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| 	ret = s35392a_rtc_read8(dev, S35390A_CMD_STATUS1);
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| 	if (ret < 0)
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| 		return -EIO;
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| 	buf = ret;
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| 
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| 	if (!lowvoltage)
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| 		lowvoltage = buf & S35390A_LOW_VOLTAGE ? 1 : 0;
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| 
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| 	if (buf & S35390A_LOW_VOLTAGE) {
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| 		/* Try up to five times to reset the chip */
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| 		if (initcount < 5) {
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| 			++initcount;
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| 			goto initialize;
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| 		} else {
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| 			return -EIO;
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| 		}
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| 	}
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| 
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| 	return 0;
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| }
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| 
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| #ifndef CONFIG_DM_RTC
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| 
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| int rtc_get(struct rtc_time *tm)
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| {
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| 	return s35392a_rtc_get(&dev, tm);
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| }
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| 
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| int rtc_set(struct rtc_time *tm)
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| {
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| 	return s35392a_rtc_set(&dev, tm);
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| }
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| 
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| void rtc_reset(void)
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| {
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| 	s35392a_rtc_reset(&dev);
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| }
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| 
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| void rtc_init(void)
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| {
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| 	s35392a_rtc_init(&dev);
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| }
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| 
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| #else
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| 
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| static int s35392a_probe(struct udevice *dev)
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| {
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| #if defined(CONFIG_DM_RTC)
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| 	/* 3-bit "command", or register, is encoded within the device address.
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| 	 */
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| 	i2c_set_chip_offset_len(dev, 0);
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| 	i2c_set_chip_addr_offset_mask(dev, 0x7);
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| #endif
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| 
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| 	s35392a_rtc_init(dev);
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| 	return 0;
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| }
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| 
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| static const struct rtc_ops s35392a_rtc_ops = {
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| 	.get = s35392a_rtc_get,
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| 	.set = s35392a_rtc_set,
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| 	.read8 = s35392a_rtc_read8,
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| 	.write8 = s35392a_rtc_write8,
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| 	.reset = s35392a_rtc_reset,
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| };
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| 
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| static const struct udevice_id s35392a_rtc_ids[] = {
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| 	{ .compatible = "sii,s35392a-rtc" },
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| 	{ .compatible = "sii,s35392a" },
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| 	{ .compatible = "s35392a" },
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| 	{ }
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| };
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| 
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| U_BOOT_DRIVER(s35392a_rtc) = {
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| 	.name	  = "s35392a_rtc",
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| 	.id	      = UCLASS_RTC,
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| 	.probe    = s35392a_probe,
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| 	.of_match = s35392a_rtc_ids,
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| 	.ops	  = &s35392a_rtc_ops,
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| };
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| 
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| #endif
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