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	- DM368 SOC - booting with spl not with UBL from TI - before loading u-boot from NAND into RAM, test the RAM with the post memory test. If error is found, switch all LEDs on and halt system. - SPI Flash Dataflash Typ: M25PE80 - Ethernet DM9161BI - MMC - USB Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
		
			
				
	
	
		
			142 lines
		
	
	
		
			5.0 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
			
		
		
	
	
			142 lines
		
	
	
		
			5.0 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
| With this approach, we don't need the UBL any more on DaVinci boards.
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| A "make boardname" will compile a u-boot.ubl, with UBL Header, which is
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| needed for the RBL to find the "UBL", which actually is a  UBL-compatible
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| header, nand spl code and u-boot code.
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| 
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| 
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| As the RBL uses another read function as the "standard" u-boot,
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| we need a command, which switches between this two read/write
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| functions, so we can write the UBL header and the spl
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| code in a format, which the RBL can read. This is realize
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| (at the moment in board specific code) in the u-boot command
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| nandrbl
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| 
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| nandrbl without arguments returns actual mode (rbl or uboot).
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| with nandrbl mode (mode = "rbl" or "uboot") you can switch
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| between the two NAND read/write modes.
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| 
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| 
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| To set up mkimage you need a config file for mkimage, example:
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| board/ait/cam_enc_4xx/ublimage.cfg
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| 
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| For information about the configuration please see:
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| doc/README.ublimage
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| 
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| Example for the cam_enc_4xx board:
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| On the cam_enc_4xx board we have a NAND flash with blocksize = 0x20000 and
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| pagesize = 0x800, so the u-boot.ubl image (which you get with:
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| "make cam_enc_4xx") looks like this:
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| 
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| 00000000  00 ed ac a1 20 00 00 00  06 00 00 00 05 00 00 00  |.... ...........|
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| 00000010  00 00 00 00 20 00 00 00  ff ff ff ff ff ff ff ff  |.... ...........|
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| 00000020  ff ff ff ff ff ff ff ff  ff ff ff ff ff ff ff ff  |................|
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| *
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| 00000800  14 00 00 ea 14 f0 9f e5  10 f0 9f e5 0c f0 9f e5  |................|
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| 00000810  08 f0 9f e5 04 f0 9f e5  00 f0 9f e5 04 f0 1f e5  |................|
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| 00000820  00 01 00 00 78 56 34 12  78 56 34 12 78 56 34 12  |....xV4.xV4.xV4.|
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| [...]
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| *
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| 00001fe0  00 00 00 00 00 00 00 00  ff ff ff ff ff ff ff ff  |................|
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| 00001ff0  ff ff ff ff ff ff ff ff  ff ff ff ff ff ff ff ff  |................|
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| *
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| 00003800  14 00 00 ea 14 f0 9f e5  14 f0 9f e5 14 f0 9f e5  |................|
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| 00003810  14 f0 9f e5 14 f0 9f e5  14 f0 9f e5 14 f0 9f e5  |................|
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| 00003820  80 01 08 81 e0 01 08 81  40 02 08 81 a0 02 08 81  |........@.......|
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| 
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| In the first "page" of the image, we have the UBL Header, needed for
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| the RBL to find the spl code.
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| 
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| The spl code starts in the second "page" of the image, with a size
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| defined by:
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| 
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| #define CONFIG_SYS_NROF_PAGES_NAND_SPL	6
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| 
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| After the spl code, there comes the "real" u-boot code
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| @ (6 + 1) * pagesize = 0x3800
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| 
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| ------------------------------------------------------------------------
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| Setting up spl code:
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| 
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| /*
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|  * RBL searches from Block n (n = 1..24)
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|  * so we can define, how many UBL Headers
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|  * we write before the real spl code
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|  */
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| #define CONFIG_SYS_NROF_UBL_HEADER	5
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| #define CONFIG_SYS_NROF_PAGES_NAND_SPL	6
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| 
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| #define CONFIG_SYS_NAND_U_BOOT_OFFS	((CONFIG_SYS_NROF_UBL_HEADER * \
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| 					CONFIG_SYS_NAND_BLOCK_SIZE) + \
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| 					(CONFIG_SYS_NROF_PAGES_NAND_SPL) * \
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| 					CONFIG_SYS_NAND_PAGE_SIZE)
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| ------------------------------------------------------------------------
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| 
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| Burning into NAND:
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| 
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| step 1:
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| The RBL searches from Block n ( n = 1..24) on page 0 for valid UBL
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| Headers, so you have to burn the UBL header page from the u-boot.ubl
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| image to the blocks, you want to have the UBL header.
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| !! Don;t forget to switch to rbl nand read/write functions with
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|    "nandrbl rbl"
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| 
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| step 2:
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| You need to setup in the ublimage.cfg, where the RBL can find the spl
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| code, and how big it is.
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| 
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| !! RBL always starts reading from page 0 !!
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| 
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| For the AIT board, we have:
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| PAGES		6
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| START_BLOCK	5
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| 
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| So we need to copy the spl code to block 5 page 0
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| !! Don;t forget to switch to rbl nand read/write functions with
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|    "nandrbl rbl"
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| 
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| step 3:
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| You need to copy the u-boot image to the block/page
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| where the spl code reads it (CONFIG_SYS_NAND_U_BOOT_OFFS)
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| !! Don;t forget to switch to rbl nand read/write functions with
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|    "nandrbl uboot", which is default.
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| 
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| On the cam_enc_4xx board it is:
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| #define CONFIG_SYS_NAND_U_BOOT_OFFS	(0xc0000)
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| 
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| -> this results in following NAND usage on the cam_enc_4xx board:
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| 
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| addr
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| 
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| 20000		possible UBL Header
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| 40000		possible UBL Header
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| 60000		possible UBL Header
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| 80000		possilbe UBL Header
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| a0000		spl code
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| c0000		u-boot code
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| 
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| The above steps are executeed through the following environment vars:
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| (using 80000 as address for the UBL header)
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| 
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| pagesz=800
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| uboot=/tftpboot/cam_enc_4xx/u-boot.ubl
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| load=tftp 80000000 ${uboot}
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| writeheader nandrbl rbl;nand erase 80000 ${pagesz};nand write 80000000 80000 ${pagesz};nandrbl uboot
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| writenand_spl nandrbl rbl;nand erase a0000 3000;nand write 80000800 a0000 3000;nandrbl uboot
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| writeuboot nandrbl uboot;nand erase c0000 5d000;nand write 80003800 c0000 5d000
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| update=run load writeheader writenand_spl writeuboot
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| 
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| If you do a "run load update" u-boot, spl + ubl header
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| are magically updated ;-)
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| 
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| Note:
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| - There seem to be a bug in the RBL code (at least on my HW),
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|   In the UBL block, I can set the page to values != 0, so it
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|   is possible to burn step 1 and step 2 in one step into the
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|   flash, but the RBL ignores the page settings, so I have to
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|   burn the UBL Header to a page 0 and the spl code to
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|   a page 0 ... :-(
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| - If we make the nand read/write functions in the RBL equal to
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|   the functions in u-boot (as I have no RBL code, it is only
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|   possible in u-boot), we could burn the complete image in
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|   one step ... that would be nice ...
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