Dalon Westergreen 6bd041f00d arm: socfpga: add cyclone5 based de10-nano board ...

Add support for the Terasic DE10-Nano board.  The board
is based on the DE0-Nano-Soc board but adds a larger FPGA
and an HDMI output.

Signed-off-by: Dalon Westergreen <dwesterg@gmail.com>
Reviewed-by: Dinh Nguyen <dinguyen@kernel.org>

2017-04-25 12:46:44 +02:00

..

include/mach

ARM: socfpga: boot0 hook: remove macro from boot0 header file

2017-04-14 14:06:42 +02:00

board.c

arm: socfpga: Introduce common board code

2015-12-20 03:36:51 +01:00

clock_manager.c

arm: socfpga: set the mpuclk divider in the Altera group register

2017-02-08 02:19:11 +01:00

fpga_manager.c

treewide: replace #include <asm/errno.h> with <linux/errno.h>

2016-09-23 17:55:42 -04:00

freeze_controller.c

treewide: replace #include <asm/errno.h> with <linux/errno.h>

2016-09-23 17:55:42 -04:00

Kconfig

arm: socfpga: add cyclone5 based de10-nano board

2017-04-25 12:46:44 +02:00

Makefile

arm: socfpga: remove building scan manager

2015-12-20 03:44:56 +01:00

misc.c

Fix spelling of "resetting".

2016-10-31 10:13:17 -04:00

qts-filter.sh

qts-filter.sh: strip DOS line endings and handle continuation lines

2016-12-06 01:45:57 +01:00

reset_manager.c

arm: socfpga: Assure ISWGRP 0 and 1 are inited

2015-09-04 11:54:20 +02:00

scan_manager.c

arm: socfpga: scan: Add code to get FPGA ID

2015-08-08 14:14:30 +02:00

spl.c

common: Pass the boot device into spl_boot_mode()

2016-06-26 20:17:22 +02:00

system_manager.c

arm: socfpga: Make the pinmux table const u8

2015-08-23 11:56:20 +02:00

timer.c

…

wrap_iocsr_config.c

arm: socfpga: Switch to filtered QTS files

2015-08-23 11:56:20 +02:00

wrap_pinmux_config.c

arm: socfpga: Make the pinmux table const u8

2015-08-23 11:56:20 +02:00

wrap_pll_config.c

arm: socfpga: set the mpuclk divider in the Altera group register

2017-02-08 02:19:11 +01:00

wrap_sdram_config.c

ddr: altera: Configuring SDRAM extra cycles timing parameters

2016-10-27 08:03:07 +02:00