Bin Meng 52dc7ae749 riscv: fu540: Use correct API to get L2 cache controller base address ...

At present fdtdec_get_addr() is used to get L2 cache controller base
address. This only works for a fixed #address-cells and #size-cells.
Change to use fdtdec_get_addr_size_auto_parent() instead.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@openfive.com>

2020-08-25 09:33:16 +08:00

..

ax25

common: Drop net.h from common header

2020-05-18 17:33:31 -04:00

fu540

riscv: fu540: Use correct API to get L2 cache controller base address

2020-08-25 09:33:16 +08:00

generic

common: Drop net.h from common header

2020-05-18 17:33:31 -04:00

cpu.c

riscv: Make SiFive HiFive Unleashed board boot again

2020-07-24 14:55:04 +08:00

Makefile

riscv: Move trap handler codes to mtrap.S

2018-12-18 09:56:27 +08:00

mtrap.S

riscv: Add option to print registers on exception

2020-02-10 14:51:08 +08:00

start.S

riscv: Fix linking error when building u-boot-spl with no SMP support

2020-07-24 14:56:13 +08:00

u-boot-spl.lds

riscv: Add _image_binary_end for SPL

2020-06-04 09:44:08 +08:00

u-boot.lds

riscv: Fix breakage caused by linker relaxation

2020-02-10 14:50:53 +08:00