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According to TRM for i.MX8M Nano and Plus, GPR10 register contains lock bit for TZASC_ID_SWAP_BYPASS bit. This bit is required to be set in order to avoid AXI bus errors when GPU is enabled on the platform. TZASC_ID_SWAP_BYPASS bit is alread set for all imx8m applicable derivatives, but is missing a lock settings to be applied. Set the TZASC_ID_SWAP_BYPASS_LOCK bit for those derivatives which have it implemented. Since we're here, provide also names to bits from TRM instead of using BIT() macro in the code. Fixes:deca6cfbf5("imx8mn: set BYPASS ID SWAP to avoid AXI bus errors") Fixes:a07c718129("imx8mp: set BYPASS ID SWAP to avoid AXI bus errors") Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com> Cc: Peng Fan <peng.fan@nxp.com>