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8bab2c893c
With this patch, gd->ram_size now holds to full RAM size detected by the DDR init code. It introduces the get_effective_memsize() function to report the maximum usable RAM size in U-Boot to the system instead. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Aaron Williams <awilliams@marvell.com> Cc: Chandrakala Chavva <cchavva@marvell.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
90 lines
1.7 KiB
C
90 lines
1.7 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2020 Stefan Roese <sr@denx.de>
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*/
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#include <config.h>
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#include <dm.h>
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#include <ram.h>
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#include <asm/global_data.h>
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#include <linux/compat.h>
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#include <display_options.h>
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DECLARE_GLOBAL_DATA_PTR;
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#define UBOOT_RAM_SIZE_MAX 0x10000000ULL
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int dram_init(void)
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{
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if (IS_ENABLED(CONFIG_RAM_OCTEON)) {
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struct ram_info ram;
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struct udevice *dev;
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int ret;
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ret = uclass_get_device(UCLASS_RAM, 0, &dev);
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if (ret) {
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debug("DRAM init failed: %d\n", ret);
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return ret;
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}
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ret = ram_get_info(dev, &ram);
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if (ret) {
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debug("Cannot get DRAM size: %d\n", ret);
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return ret;
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}
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gd->ram_size = ram.size;
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debug("SDRAM base=%lx, size=%lx\n",
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(unsigned long)ram.base, (unsigned long)ram.size);
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} else {
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/*
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* No DDR init yet -> run in L2 cache
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*/
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gd->ram_size = (4 << 20);
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gd->bd->bi_dram[0].size = gd->ram_size;
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gd->bd->bi_dram[1].size = 0;
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}
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return 0;
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}
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void board_add_ram_info(int use_default)
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{
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if (IS_ENABLED(CONFIG_RAM_OCTEON)) {
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struct ram_info ram;
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struct udevice *dev;
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int ret;
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ret = uclass_get_device(UCLASS_RAM, 0, &dev);
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if (ret) {
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debug("DRAM init failed: %d\n", ret);
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return;
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}
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ret = ram_get_info(dev, &ram);
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if (ret) {
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debug("Cannot get DRAM size: %d\n", ret);
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return;
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}
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printf(" (");
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print_size(ram.size, " total)");
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}
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}
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phys_size_t get_effective_memsize(void)
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{
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return UBOOT_RAM_SIZE_MAX;
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}
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ulong board_get_usable_ram_top(ulong total_size)
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{
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if (IS_ENABLED(CONFIG_RAM_OCTEON)) {
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/* Map a maximum of 256MiB - return not size but address */
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return CONFIG_SYS_SDRAM_BASE + min(gd->ram_size,
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UBOOT_RAM_SIZE_MAX);
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} else {
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return gd->ram_top;
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}
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}
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