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With DDR4, Intel SOCs take quite a long time to init their memory. During this time, if the user is watching, it looks like SPL has hung. Add a message in this case. This works by adding a return code to fspm_update_config() that indicates whether MRC data was found and a new property to the device tree. Also add one more debug message while starting. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
99 lines
3.0 KiB
C
99 lines
3.0 KiB
C
/* SPDX-License-Identifier: Intel */
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/*
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* Copyright (C) 2015-2016 Intel Corp.
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* (Written by Alexandru Gagniuc <alexandrux.gagniuc@intel.com> for Intel Corp.)
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* Mostly taken from coreboot
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*/
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#ifndef __ASM_FSP_INTERNAL_H
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#define __ASM_FSP_INTERNAL_H
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struct binman_entry;
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struct fsp_header;
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struct fspm_upd;
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struct fsps_upd;
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enum fsp_type_t {
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FSP_M,
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FSP_S,
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};
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int fsp_get_header(ulong offset, ulong size, bool use_spi_flash,
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struct fsp_header **fspp);
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/**
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* fsp_locate_fsp() - Locate an FSP component
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*
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* This finds an FSP component by various methods. It is not as general-purpose
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* as it looks, since it expects FSP-M to be requested in SPL (only), and FSP-S
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* to be requested in U-Boot proper.
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*
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* @type: Component to locate
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* @entry: Returns location of component
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* @use_spi_flash: true to read using the Fast SPI driver, false to use
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* memory-mapped SPI flash
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* @devp: Returns northbridge device
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* @hdrp: Returns FSP header
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* @rom_offsetp: If non-NULL, returns the offset to add to any image position to
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* find the memory-mapped location of that position. For example, for ROM
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* position 0x1000, it will be mapped into 0x1000 + *rom_offsetp.
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*/
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int fsp_locate_fsp(enum fsp_type_t type, struct binman_entry *entry,
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bool use_spi_flash, struct udevice **devp,
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struct fsp_header **hdrp, ulong *rom_offsetp);
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/**
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* arch_fsps_preinit() - Perform init needed before calling FSP-S
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*
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* This allows use of probed drivers and PCI so is a convenient place to do any
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* init that is needed before FSP-S is called. After this, U-Boot relocates and
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* calls arch_fsp_init_r() before PCI is probed, and that function is not
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* allowed to probe PCI before calling FSP-S.
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*/
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int arch_fsps_preinit(void);
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/**
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* fspm_update_config() - Set up the config structure for FSP-M
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*
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* @dev: Hostbridge device containing config
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* @upd: Config data to fill in
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* @return 0 if OK, -ENOENT if OK but no MRC-cache data was found, other -ve on
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* error
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*/
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int fspm_update_config(struct udevice *dev, struct fspm_upd *upd);
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/**
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* fspm_done() - Indicate that memory init is complete
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*
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* This allows the board to do whatever post-init it needs before things
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* continue.
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*
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* @dev: Hostbridge device
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* @return 0 if OK, -ve on error
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*/
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int fspm_done(struct udevice *dev);
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/**
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* fsps_update_config() - Set up the config structure for FSP-S
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*
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* @dev: Hostbridge device containing config
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* @rom_offset: Value to add to convert from ROM offset to memory-mapped address
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* @upd: Config data to fill in
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* @return 0 if OK, -ve on error
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*/
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int fsps_update_config(struct udevice *dev, ulong rom_offset,
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struct fsps_upd *upd);
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/**
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* prepare_mrc_cache() - Read the MRC cache into the product-data struct
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*
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* This looks for cached Memory-reference code (MRC) data and stores it into
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* @upd for use by the FSP-M binary.
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*
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* @return 0 if OK, -ENOENT if no data (whereupon the caller can continue and
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* expect a slower boot), other -ve value on other error
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*/
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int prepare_mrc_cache(struct fspm_upd *upd);
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#endif
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