Tien Fong Chee 4720b83d2c arm: socfpga: arria10: Enable double peripheral RBF configuration ...

Double peripheral RBF configuration are needed on some devices or boards
to stabilize the IO configuration system.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Sin Hui Kho <sin.hui.kho@intel.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>

2021-12-17 12:58:01 +08:00

..

base_addr_a10.h

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base_addr_ac5.h

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base_addr_soc64.h

arm: socfpga: Add base address for Intel N5X device

2021-08-24 15:14:23 +08:00

boot0.h

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clock_manager_agilex.h

arm: socfpga: Move cm_get_mpu_clk_hz function declaration to clock_manager.h

2021-08-25 13:31:40 +08:00

clock_manager_arria10.h

arm: socfpga: Move cm_get_mpu_clk_hz function declaration to clock_manager.h

2021-08-25 13:31:40 +08:00

clock_manager_gen5.h

arm: socfpga: Move cm_get_mpu_clk_hz function declaration to clock_manager.h

2021-08-25 13:31:40 +08:00

clock_manager_n5x.h

arm: socfpga: Add clock manager for Intel N5X device

2021-08-25 13:32:50 +08:00

clock_manager_s10.h

arm: socfpga: Move cm_get_mpu_clk_hz function declaration to clock_manager.h

2021-08-25 13:31:40 +08:00

clock_manager_soc64.h

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clock_manager.h

arm: socfpga: Add clock manager for Intel N5X device

2021-08-25 13:32:50 +08:00

firewall.h

ddr: altera: Add SDRAM driver for Intel N5X device

2021-08-25 13:47:05 +08:00

fpga_manager_arria10.h

WS cleanup: remove SPACE(s) followed by TAB

2021-09-30 09:08:16 -04:00

fpga_manager_gen5.h

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fpga_manager.h

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freeze_controller.h

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gpio.h

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handoff_soc64.h

arm: socfpga: Add handoff data support for Intel N5X device

2021-08-24 17:13:35 +08:00

mailbox_s10.h

arm: socfpga: soc64: Support Vendor Authorized Boot (VAB)

2021-03-08 10:59:10 +08:00

misc.h

arm: socfpga: arria10: Enable double peripheral RBF configuration

2021-12-17 12:58:01 +08:00

nic301.h

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pinmux.h

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reset_manager_arria10.h

arm: socfpga: arria10: Reset MPFE NoC after program periph / combined RBF

2021-12-17 12:58:01 +08:00

reset_manager_gen5.h

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reset_manager_soc64.h

arm: socfpga: soc64: Show reset state in SPL

2020-10-09 17:53:11 +08:00

reset_manager.h

Merge tag 'v2021.04-rc4' into next

2021-03-15 12:15:38 -04:00

scan_manager.h

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scu.h

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sdram_arria10.h

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sdram_gen5.h

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sdram.h

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secure_reg_helper.h

arm: socfpga: Add secure register access helper functions for SoC 64bits

2021-01-15 17:48:36 +08:00

secure_vab.h

arm: socfpga: soc64: Support Vendor Authorized Boot (VAB)

2021-03-08 10:59:10 +08:00

smc_api.h

arm: socfpga: smc: Add function to get usercode

2021-04-08 17:29:13 +08:00

system_manager_arria10.h

arm: socfpga: arria10: Reset MPFE NoC after program periph / combined RBF

2021-12-17 12:58:01 +08:00

system_manager_gen5.h

arm: socfpga: fix Gen5 enable of EMAC via FPGA

2020-10-21 11:45:54 +08:00

system_manager_soc64.h

ddr: altera: Add SDRAM driver for Intel N5X device

2021-08-25 13:47:05 +08:00

system_manager.h

arm: socfpga: Move Stratix10 and Agilex to use TARGET_SOCFPGA_SOC64

2021-03-08 10:59:10 +08:00

timer.h

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