mirror of
https://xff.cz/git/u-boot/
synced 2025-08-31 16:22:36 +02:00
af66b096a9
Previously we have known that R40 has a configuration register for its rank 1, which allows different configuration than rank 0. Reverse engineering of newest libdram of A64 from Allwinner shows that A64 has this register too. It's bit 0 (which enables dual rank in rank 0 configuration register) means a dedicated rank size setup is used for rank 1. Now, Pine64 scheduled to use a 3GiB LPDDR3 DRAM chip (which has 2GiB rank 0 and 1GiB rank 1) on PinePhone, that makes asymmetric dual rank DRAM support necessary. Add this support. As we have gained knowledge of asymmetric dual rank, we can now allow R40 dual rank memory setup to work too. Signed-off-by: Icenowy Zheng <icenowy@aosc.io>