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CPUS is a power management co-processor on some Allwinner SoCs (H3, A83T). Signed-off-by: Ondrej Jirman <megous@megous.com>
70 lines
1.2 KiB
C
70 lines
1.2 KiB
C
/*
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* Written by Ondrej Jirman <megous@megous.com>, 2018
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <command.h>
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#include <asm/io.h>
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#include <watchdog.h>
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#define R_CPUCFG_BASE 0x01f01c00
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static void reset_cpus(int stop)
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{
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uint32_t cpu_cfg;
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cpu_cfg = readl(R_CPUCFG_BASE);
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cpu_cfg &= ~(1uL);
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writel(cpu_cfg, R_CPUCFG_BASE);
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mdelay(1);
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if (!stop) {
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cpu_cfg |= 1;
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writel(cpu_cfg, R_CPUCFG_BASE);
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}
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}
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static int do_arisc_start(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
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{
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reset_cpus(0);
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return 0;
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}
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static int do_arisc_stop(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
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{
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reset_cpus(1);
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return 0;
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}
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static int do_arisc_takeover(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
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{
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reset_cpus(0);
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while (1) {
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WATCHDOG_RESET();
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mdelay(10);
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}
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return 0;
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}
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U_BOOT_CMD(
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arisc_start, 3, 1, do_arisc_start,
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"reset arisc comprocessor and de-assert the reset line",
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""
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);
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U_BOOT_CMD(
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arisc_stop, 3, 1, do_arisc_stop,
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"reset arisc comprocessor and keep it reset",
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""
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);
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U_BOOT_CMD(
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arisc_takeover, 3, 1, do_arisc_takeover,
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"reset arisc comprocessor and de-assert the reset line, stop u-boot",
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""
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);
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