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https://xff.cz/git/u-boot/
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d678a59d2d
When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"' I failed to notice that b4 noticed it was based on next and so took that as the base commit and merged that part of next to master. This reverts commitc8ffd1356d, reversing changes made to2ee6f3a5f7. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com>
98 lines
2.4 KiB
C
98 lines
2.4 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2020, Sean Anderson <seanga2@gmail.com>
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* Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com>
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*/
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#include <common.h>
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#include <clk.h>
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#include <div64.h>
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#include <dm.h>
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#include <timer.h>
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#include <asm/io.h>
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#include <dm/device-internal.h>
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#include <linux/err.h>
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#define CLINT_MTIME_OFFSET 0xbff8
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#define ACLINT_MTIME_OFFSET 0
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/* mtime register */
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#define MTIME_REG(base, offset) ((ulong)(base) + (offset))
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static u64 notrace riscv_aclint_timer_get_count(struct udevice *dev)
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{
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return readq((void __iomem *)MTIME_REG(dev_get_priv(dev),
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dev_get_driver_data(dev)));
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}
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#if CONFIG_IS_ENABLED(RISCV_MMODE) && IS_ENABLED(CONFIG_TIMER_EARLY)
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/**
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* timer_early_get_rate() - Get the timer rate before driver model
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*/
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unsigned long notrace timer_early_get_rate(void)
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{
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return RISCV_MMODE_TIMER_FREQ;
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}
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/**
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* timer_early_get_count() - Get the timer count before driver model
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*
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*/
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u64 notrace timer_early_get_count(void)
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{
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return readq((void __iomem *)MTIME_REG(RISCV_MMODE_TIMERBASE,
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RISCV_MMODE_TIMEROFF));
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}
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#endif
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#if CONFIG_IS_ENABLED(RISCV_MMODE) && CONFIG_IS_ENABLED(BOOTSTAGE)
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ulong timer_get_boot_us(void)
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{
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int ret;
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u64 ticks = 0;
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u32 rate;
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ret = dm_timer_init();
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if (!ret) {
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rate = timer_get_rate(gd->timer);
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timer_get_count(gd->timer, &ticks);
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} else {
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rate = RISCV_MMODE_TIMER_FREQ;
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ticks = readq((void __iomem *)MTIME_REG(RISCV_MMODE_TIMERBASE,
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RISCV_MMODE_TIMEROFF));
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}
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/* Below is converted from time(us) = (tick / rate) * 10000000 */
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return lldiv(ticks * 1000, (rate / 1000));
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}
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#endif
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static const struct timer_ops riscv_aclint_timer_ops = {
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.get_count = riscv_aclint_timer_get_count,
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};
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static int riscv_aclint_timer_probe(struct udevice *dev)
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{
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dev_set_priv(dev, dev_read_addr_ptr(dev));
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if (!dev_get_priv(dev))
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return -EINVAL;
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return timer_timebase_fallback(dev);
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}
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static const struct udevice_id riscv_aclint_timer_ids[] = {
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{ .compatible = "riscv,clint0", .data = CLINT_MTIME_OFFSET },
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{ .compatible = "sifive,clint0", .data = CLINT_MTIME_OFFSET },
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{ .compatible = "riscv,aclint-mtimer", .data = ACLINT_MTIME_OFFSET },
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{ }
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};
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U_BOOT_DRIVER(riscv_aclint_timer) = {
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.name = "riscv_aclint_timer",
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.id = UCLASS_TIMER,
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.of_match = riscv_aclint_timer_ids,
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.probe = riscv_aclint_timer_probe,
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.ops = &riscv_aclint_timer_ops,
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.flags = DM_FLAG_PRE_RELOC,
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};
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