2 Commits

Author	SHA1	Message	Date
Shengzhou Liu	e04f9d0c2f	board/freescale: Update ddr clk_adjust ... This patch updates clk_adjust to actual value for boards with T-series and LS-series SoCs to match the setting of clk_adjust in latest ddr driver. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>	2016-06-03 14:06:57 -07:00
Chunhe Lan	0b2e13d9cc	powerpc/85xx: Add T4240RDB board support ... T4240RDB board Specification ---------------------------- Memory subsystem: 6GB DDR3 128MB NOR flash 2GB NAND flash Ethernet: Eight 1G SGMII ports Four 10Gbps SFP+ ports PCIe: Two PCIe slots USB: Two USB2.0 Type A ports SDHC: One SD-card port SATA: One SATA port UART: Dual RJ45 ports Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com> [York Sun: fix CONFIG_SYS_QE_FMAN_FW_ADDR in T4240RDB.h]	2014-05-13 08:24:32 -07:00