3 Commits

Author	SHA1	Message	Date
Bin Meng	833508c05c	cpu: Add a RISC-V CPU driver ... This adds a driver for RISC-V CPU. Note the driver will bind a RISC-V timer driver if "timebase-frequency" property is present in the device tree. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Anup Patel <anup@brainfault.org>	2018-12-18 09:56:26 +08:00
Mario Six	19fbdca47b	cpu: Add MPC83xx CPU driver ... Add a CPU driver for the MPC83xx architecture. Signed-off-by: Mario Six <mario.six@gdsys.cc>	2018-09-18 08:12:21 -06:00
Simon Glass	11f4dc1583	dm: Implement a CPU uclass ... It is useful to be able to keep track of the available CPUs in a multi-CPU system. This uclass is mostly intended for use with SMP systems. The uclass provides methods for getting basic information about each CPU. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>	2015-04-29 21:02:33 -06:00