3 Commits

Author	SHA1	Message	Date
Anand Gadiyar	997d7a2b4b	arm: dts: k3-am64-ddr fix typo causing DDR4 register corruption ... The entry for DDRSS_PI_321_DATA was accidentally repeated leading to the last few PI registers being incorrectly programmed. Fix this. Reported-by: Bin Liu <b-liu@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Anand Gadiyar <gadiyar@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>	2022-07-25 13:02:04 -04:00
Dave Gerlach	1a40ddffec	arm: dts: k3-am64-ddr: Add ss_cfg reg entry ... Add 'ss_cfg' memory region for memorycontroller node which is required to enable ECC. Signed-off-by: Dave Gerlach <d-gerlach@ti.com>	2022-04-04 19:02:04 -04:00
Dave Gerlach	fe0f3e3697	arm: dts: k3-am642: Add ddr node ... Introduce ddr node for am642 needed for all ddr configurations. Also, introduce the 1600MTs DDR4 configuration that is supported on the am642-evm. Signed-off-by: Dave Gerlach <d-gerlach@ti.com>	2021-05-12 16:31:15 +05:30