Since we can now cleanly disable CMDLINE when needed, drop the rules
which discard the command code. It will not be built in the first
place.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Add initial support for STM32MP2 SoCs family.
SoCs information are available here :
https://www.st.com/content/st_com/en/campaigns/microprocessor-stm32mp2.html
Migrate all MP1 related code into stm32mp1/ directory
Create stm32mp2 directory dedicated for STM32MP2 SoCs.
Common code to MP1, MP13 and MP25 is kept into
arch/arm/mach-stm32/mach-stm32mp directory :
- boot_params.c
- bsec
- cmd_stm32key
- cmd_stm32prog
- dram_init.c
- syscon.c
- ecdsa_romapi.c
For STM32MP2, it also :
- adds memory region description needed for ARMv8 MMU.
- enables early data cache before relocation.
During the transition before/after relocation, the MMU, initially setup
at the beginning of DDR, must be setup again at a correct address after
relocation. This is done in enables_caches() by disabling cache, force
arch.tlb_fillptr to NULL which will force the MMU to be setup again but
with a new value for gd->arch.tlb_addr. gd->arch.tlb_addr has been
updated after relocation in arm_reserve_mmu().
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Add STM32MP257F Evaluation board support. It embeds a STM32MP257FAI SoC,
with 4GB of DDR4, TSN switch (2+1 ports), 2*USB typeA, 1*USB2 typeC,
SNOR OctoSPI, mini PCIe, STPMIC2 for power distribution ...
Sync device tree with kernel v6.6-rc1.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
When building with AARCH64 defconfig, we got warnings for debug
message
- format '%x' expects argument of type 'unsigned int',
but argument 3 has type 'size_t' {aka 'long unsigned int'}).
- format '%lx' expects argument of type 'long unsigned int',
but argument 2 has type 'phys_addr_t' {aka 'long long unsigned
int'}
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
This fixes the following compilation error in ARM64:
arch/arm/mach-stm32mp/dram_init.c: In function ‘board_get_usable_ram_top’:
arch/arm/mach-stm32mp/dram_init.c:59:45: error: ‘DCACHE_DEFAULT_OPTION’ undeclared (first use in this function)
59 | mmu_set_region_dcache_behaviour(reg, size, DCACHE_DEFAULT_OPTION);
| ^~~~~~~~~~~~~~~~~~~~~
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Add support for a semihosting fallback on 32-bit ARM. The assembly is
lightly adapted from the irq return code, except there is no offset
since lr already points to the correct instruction. The C side is mostly
like ARM64, except we have fewer cases to deal with.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
U-Boot runs in supervisor mode. On ARMv6 and lower, software interrupts
are taken in supervisor mode. When entering an interrupt, the link
register is set to the address of the next instruction. However, if we
are already in supervisor mode, this clobbers the link register. The
debugger can't help us, since by the time it notices we've taken a
software interrupt, the link register is already gone. Work around this
by moving the return address to another register.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
When we take a software interrupt, we are already in supervisor mode.
get_bad_stack assumes we are not in supervisor mode so it can clobber
the stack pointer. This causes us to have an invalid stack once that
macro finishes. Revert back to the get_bad_stack_swi macro which was
previously removed.
Fixes: 41623c91b0 ("arm: move exception handling out of start.S files")
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
The migration deadline for moving to DM_SCSI was v2023.04. A further
reminder was sent out in August 2023 to the remaining platforms that had
not migrated already, and that a few more over the line (or configs
deleted).
With this commit we:
- Rename CONFIG_DM_SCSI to CONFIG_SCSI.
- Remove all of the non-DM SCSI code. This includes removing other
legacy symbols and code and removes some legacy non-DM AHCI code.
- Some platforms that had previously been DM_SCSI=y && SCSI=n are now
fully migrated to DM_SCSI as a few corner cases in the code assumed
DM_SCSI=y meant SCSI=y.
Signed-off-by: Tom Rini <trini@konsulko.com>
In order to not rely on common.h providing a number of common includes,
cleanup what we include directly in order to be able to drop common.h
later.
Signed-off-by: Tom Rini <trini@konsulko.com>
The include <asm/arch/cpu.h> references values in <asm/arch/omap3.h> and
so include it directly here rather than rely on indirect inclusion.
Signed-off-by: Tom Rini <trini@konsulko.com>
In matching other architectures that have their global_data.h need to
bring in a types.h header, switch to <linux/types.h> on PowerPC.
Signed-off-by: Tom Rini <trini@konsulko.com>
Add a mostly empty asm/barrier.h file for sandbox where we define nop() to
be an empty function.
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Add some dependencies on features that we had been selecting so that we
can still disable CMDLINE.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
This is not used for sandbox, so drop it. Enable the things that it
controls to avoid dstrastic changes in the config settings for
sandbox builds.
The end result is that these are enabled:
BOOTMETH_DISTRO
BOOTSTD_DEFAULTS
and these are disabled:
USE_BOOTCOMMAND
BOOTCOMMAND (was "run distro_bootcmd")
DISTRO_DEFAULTS
Note that the tools-only build has already disabled DISTRO_DEFAULTS
and BOOTSTD_FULL
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
This adds support for the Inteno XG6846 board based on the
Broadcom MIPS 6328 SoC.
The default boot will read a uImage from flash and boot it.
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Board specific late init allows vendors to set up different device
or board specific env variables (like serial number, platform name).
In case this information is missing, u-boot will lack info regards
serial or platform.
To avoid this prior nvidia_board_late_init internal generic function
is called which fills required data. In this case platform name is
obtained from get_chip and serialno is filled with SoC id.
Though SoC id is not dedicated to be devices serial but it fits well
in case of restriction of data about device and since SoC is basically
a main chip of the device.
Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS Transformers
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # Nvidia Tegratab
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Re-crypt support was extended to devices without burnt SBK. In case
SBK is not set, place from where it is read is filled with zeroes.
This patch adds support for ebtupdate function to detect nosbk device
and avoid crypto operations for it.
Tested-by: Maksim Kurnosenko <asusx2@mail.ru>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Tegra 4, same as Tegra 3, requires configuration of CPU and CORE
voltages in the SPL stage to boot properly. Expose function to be
able perform this configuration in the SPL section of the device
board.
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # ASUS TF701T
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
TF201 unlike other transformers uses non-fused xcvr value for
its dock USB port. With out it dock USB and SD reader will not
work.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
TF600T has significant differences (Tegra DSI and DSI panel,
own power supply system) which makes use of common transformer
device tree complicated.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
P1801-T has significant differences (hdmi panel and backlight,
own power supply system) which makes use of common transformer
device tree complicated.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Default-tap and default-trim values are used for eMMC setup
mostly on T114+ devices. As for now, those values are hardcoded
for T210 and ignored for all other Tegra generations. Fix this
by passing tap and trim values from dts.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Tegra MMC driver has hardcoded tap and trim values as for now.
Set default-tap and default-trim values in sdhci nodes to avoid
regressions in case Tegra MMC driver is upated to use dts values.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
The sandbox should closely mimic other architectures.
Place each function or data in a separate section and let the linker
eliminate unused ones. This will reduce the binary size.
In the linker script mark that u_boot_sandbox_getopt are to be kept.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
For most source files we can just drop <common.h>. We need to add an
include for <asm/u-boot.h> in a couple of places. Also sort the include
list in memmap-gen3.c while we're here.
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
If <common.h> won't be included before <asm/armv8/mmu.h>, we need to
ensure that we have the required type definitions.
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
This imports mmio functions from Linux's arch/riscv/include/asm/mmio.h
to use read/write[b|w|l|q]_relaxed functions.
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
If CSRs like seed are readable by S-mode, may not be determinable by
S-mode. For safe driver probing allow to resume via a longjmp after an
exception.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Some RISC-V CPUs, such as the T-HEAD XuanTie series, have a
vendor-specific way to invalidate a portion of the instruction cache.
Allow them to override invalidate_icache_range().
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
