chenhui zhao
|
568336ecc7
|
powerpc/mpc85xxcds: Fix PCI speed
The CDS uses PCICLK as SYSCLK. The PCICLK should be 33333333Hz or 66666666Hz.
Signed-off-by: Ebony Zhu <ebony.zhu@freescale.com>
Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|
2011-10-03 08:52:14 -05:00 |
|
Jean-Christophe PLAGNIOL-VILLARD
|
6d0f6bcf33
|
rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
|
2008-10-18 21:54:03 +02:00 |
|
Kumar Gala
|
415a613bab
|
Move the MPC8541/MPC8555/MPC8548 CDS board under board/freescale.
Minor path corrections needed to ensure buildability.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|
2007-12-11 22:34:20 -06:00 |
|