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Merge branch 'master' of git://git.denx.de/u-boot-mips

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This commit is contained in:
Tom Rini
2015-07-08 17:14:02 -04:00
parent f3edfd3054 b11c5d1dc2
commit fb69b6cd27
3 changed files with 10 additions and 10 deletions
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2
arch/mips/include/asm/cacheops.h
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@@ -18,7 +18,7 @@ static inline void mips_cache(int op, const volatile void *addr)
#ifdef __GCC_HAVE_BUILTIN_MIPS_CACHE #ifdef __GCC_HAVE_BUILTIN_MIPS_CACHE
__builtin_mips_cache(op, addr); __builtin_mips_cache(op, addr);
#else #else
__asm__ __volatile__("cache %0, %1" : : "i"(op), "R"(addr)) __asm__ __volatile__("cache %0, %1" : : "i"(op), "R"(addr));
#endif #endif
} }

12
arch/mips/include/asm/io.h
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@@ -117,7 +117,7 @@ static inline void set_io_port_base(unsigned long base)
* Change virtual addresses to physical addresses and vv. * Change virtual addresses to physical addresses and vv.
* These are trivial on the 1:1 Linux/MIPS mapping * These are trivial on the 1:1 Linux/MIPS mapping
*/ */
extern inline phys_addr_t virt_to_phys(volatile void * address) static inline phys_addr_t virt_to_phys(volatile void * address)
{ {
#ifndef CONFIG_64BIT #ifndef CONFIG_64BIT
return CPHYSADDR(address); return CPHYSADDR(address);
@@ -126,7 +126,7 @@ extern inline phys_addr_t virt_to_phys(volatile void * address)
#endif #endif
} }
extern inline void * phys_to_virt(unsigned long address) static inline void * phys_to_virt(unsigned long address)
{ {
#ifndef CONFIG_64BIT #ifndef CONFIG_64BIT
return (void *)KSEG0ADDR(address); return (void *)KSEG0ADDR(address);
@@ -138,7 +138,7 @@ extern inline void * phys_to_virt(unsigned long address)
/* /*
* IO bus memory addresses are also 1:1 with the physical address * IO bus memory addresses are also 1:1 with the physical address
*/ */
extern inline unsigned long virt_to_bus(volatile void * address) static inline unsigned long virt_to_bus(volatile void * address)
{ {
#ifndef CONFIG_64BIT #ifndef CONFIG_64BIT
return CPHYSADDR(address); return CPHYSADDR(address);
@@ -147,7 +147,7 @@ extern inline unsigned long virt_to_bus(volatile void * address)
#endif #endif
} }
extern inline void * bus_to_virt(unsigned long address) static inline void * bus_to_virt(unsigned long address)
{ {
#ifndef CONFIG_64BIT #ifndef CONFIG_64BIT
return (void *)KSEG0ADDR(address); return (void *)KSEG0ADDR(address);
@@ -165,12 +165,12 @@ extern unsigned long isa_slot_offset;
extern void * __ioremap(unsigned long offset, unsigned long size, unsigned long flags); extern void * __ioremap(unsigned long offset, unsigned long size, unsigned long flags);
#if 0 #if 0
extern inline void *ioremap(unsigned long offset, unsigned long size) static inline void *ioremap(unsigned long offset, unsigned long size)
{ {
return __ioremap(offset, size, _CACHE_UNCACHED); return __ioremap(offset, size, _CACHE_UNCACHED);
} }
extern inline void *ioremap_nocache(unsigned long offset, unsigned long size) static inline void *ioremap_nocache(unsigned long offset, unsigned long size)
{ {
return __ioremap(offset, size, _CACHE_UNCACHED); return __ioremap(offset, size, _CACHE_UNCACHED);
} }

6
arch/mips/include/asm/system.h
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@@ -22,7 +22,7 @@
#include <linux/kernel.h> #include <linux/kernel.h>
#endif #endif
extern __inline__ void static __inline__ void
__sti(void) __sti(void)
{ {
__asm__ __volatile__( __asm__ __volatile__(
@@ -46,7 +46,7 @@ __sti(void)
* R4000/R4400 need three nops, the R4600 two nops and the R10000 needs * R4000/R4400 need three nops, the R4600 two nops and the R10000 needs
* no nops at all. * no nops at all.
*/ */
extern __inline__ void static __inline__ void
__cli(void) __cli(void)
{ {
__asm__ __volatile__( __asm__ __volatile__(
@@ -207,7 +207,7 @@ do { \
* For 32 and 64 bit operands we can take advantage of ll and sc. * For 32 and 64 bit operands we can take advantage of ll and sc.
* FIXME: This doesn't work for R3000 machines. * FIXME: This doesn't work for R3000 machines.
*/ */
extern __inline__ unsigned long xchg_u32(volatile int * m, unsigned long val) static __inline__ unsigned long xchg_u32(volatile int * m, unsigned long val)
{ {
#ifdef CONFIG_CPU_HAS_LLSC #ifdef CONFIG_CPU_HAS_LLSC
unsigned long dummy; unsigned long dummy;